參數(shù)資料
型號： EPVP6800
廠商： ELAN Microelctronics Corp .
英文描述： VFD Controller
中文描述： 變頻控制器
文件頁數(shù)： 36/47頁
文件大?。?/td> 325K
代理商： EPVP6800
ePVP6800
VFD Controller
30 of 47
11. 28.2004
(V1.23)
This specification is subject to change without further notice.
0 0111 11rr rrrr
07rr
JZ R
R+1
→
R, skip if zero
None
2 if skip
0 100b bbrr rrrr
0xxx
BC R,b
0
→
R(b)
None
1
0 101b bbrr rrrr
0xxx
BS R,b
1
→
R(b)
None
1
0 110b bbrr rrrr
0xxx
JBC R,b
if R(b)=0, skip
None
2 if skip
0 111b bbrr rrrr
0xxx
JBS R,b
if R(b)=1, skip
None
2 if skip
1 00kk kkkk kkkk
1kkk
CALL k
PC+1
→
[SP]
(Page, k)
→
PC
None
2
1 01kk kkkk kkkk
1kkk
JMP k
(Page, k)
→
PC
None
2
1 1000 kkkk kkkk
18kk
MOV A,k
k
→
A
None
1
1 1001 kkkk kkkk
19kk
OR A,k
A
∨
k
→
A
Z
1
1 1010 kkkk kkkk
1Akk
AND A,k
A & k
→
A
Z
1
1 1011 kkkk kkkk
1Bkk
XOR A,k
A
⊕
k
→
A
Z
1
1 1100 kkkk kkkk
1Ckk
RETL k
k
→
A, [Top of Stack]
→
PC
None
2
1 1101 kkkk kkkk
1Dkk
SUB A,k
k-A
→
A
Z,C,DC
1
1 1110 0000 0001
1E01
INT
PC+1
→
[SP]
001H
→
PC
None
1
1 1110 100k kkkk
1E8k
PAGE k
K->R5(4:0)
None
1
1 1111 kkkk kkkk
1Fkk
ADD A,k
k+A
→
A
Z,C,DC
1
8
Segment Data Buffers
The ePVP6800 chip provides a total of 128 bytes data RAM. On the other hand, display Segment
Data Buffers can be stored either in the data RAM of 128 bytes sizes (00h~40h) or in the common
registers of Bank 2 and Bank 3 (20h~3Fh).
a) Data RAM Address
00h~38h
57X8 Segment Data Buffers
39h~3Eh
6X8 Key Scanning Data Buffers
3Fh
SW data register
40h
LED data register
b) Common Registers Address
20
Bank0~Bank3
:
Common registers
3F
(32x8 for each bank)
These buffers store display RAM. The display RAM stores the data transmitted from an external
device to the ePVP6800 through the serial interface and is assigned addresses as follows, in units of 8
bits:
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