
ePVP6800
VFD Controller
This specification is subject to change without further notice.
11.28.2004 (V123)
5 of 47
6 Pin Descriptions
Pin No.
Pin Name
I/O #
Description
Note
32
VDD
-
1 Logic power supply
24 – 27
GPIOC0 – GPIOC3
I/O 4
General Purpose I/O pins
:
1. Key data input to these pins is latched at the end of display
cycle.
2. These pins constitute 4-bit general-purpose input/output port.
3. Programmable Internal Pull-High
4. Wake-up Function
Schmitt
Pull-up
1-9
(B Cell)
GR1 – GR9
O 9 1. High voltage grid output
~
10-11
(B Cell)
GR10/SG8
–
GR1 /SG7
O 2
1. High voltage grid output
2. High voltage segment output
12-13
(A Cell)
SG6
–
SG5
O 2
1. High voltage grid output
2. High voltage segment output
14-17
(C Cell)
SG4/KS4
–
SG1/KS1
I/O 4
1. High voltage segment output
2. Matrix key scan output
3. General Purpose Input pins
: p
54~p57
20 – 23
GPIO90/LED0 –
GPIO93/LED3
I/O 4
1. General Purpose I/O pins
2. LED output pin (20mA)
3. IR Detector
4. Interrupt Function
5. Programmable Internal Pull-High
Schmitt
Pull-up
28
PLLC
I
1
Phase Lock Loop Capacitor
(connect a Capacitor 0.01 to 0.047u
to the Ground).
29
OSCI
I
1 Crystal Oscillator input pin (32, 768Hz)
30
OSCO
O 1 Crystal Oscillator output pin (32, 768Hz)
31
VSS
-
1 Connect this pin to GND of the system
19
/RESET
I
1 Low active RESET signal input
Schmitt
18
VEE
-
1 Pull-down level (VDD-(-40V)max)