參數(shù)資料
型號： EP4SGX70HF35I4N
廠商： Altera
文件頁數(shù)： 2/82頁
文件大?。?/td> 0K
描述： IC STRATIX IV FPGA 70K 1152FBGA
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 3
系列： Stratix® IV GX
LAB/CLB數(shù)： 2904
邏輯元件/單元數(shù)： 72600
RAM 位總計： 7564880
輸入/輸出數(shù)： 488
電源電壓： 0.87 V ~ 0.93 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 1152-BBGA
供應(yīng)商設(shè)備封裝： 1152-FBGA（27x27）
1–2
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Electrical Characteristics
Stratix IV Device Handbook
March 2014
Altera Corporation
Volume 4: Device Datasheet and Addendum
c Conditions other than those listed in Table 1–1, Table 1–2, and Table 1–3 may cause
permanent damage to the device. Additionally, device operation at the absolute
maximum ratings for extended periods of time may have adverse effects on the
device.
Table 1–1. Absolute Maximum Ratings for Stratix IV Devices
Symbol
Description
Minimum
Maximum
Unit
VCC
Core voltage and periphery circuitry power supply
-0.5
1.35
V
VCCPT
Power supply for programmable power technology
-0.5
1.8
V
VCCPGM
Configuration pins power supply
-0.5
3.75
V
VCCAUX
Auxiliary supply for the programmable power technology
-0.5
3.75
V
VCCBAT
Battery back-up power supply for design security volatile key register
-0.5
3.75
V
VCCPD
I/O pre-driver power supply
-0.5
3.75
V
VCCIO
I/O power supply
-0.5
3.9
V
VCC_CLKIN
Differential clock input power supply
-0.5
3.75
V
VCCD_PLL
PLL digital power supply
-0.5
1.35
V
VCCA_PLL
PLL analog power supply
-0.5
3.75
V
VI
DC input voltage
-0.5
4.0
V
IOUT
DC output current per pin
-25
40
mA
TJ
Operating junction temperature
-55
125
°C
TSTG
Storage temperature (No bias)
-65
150
°C
Table 1–2. Transceiver Power Supply Absolute Maximum Ratings for Stratix IV GX Devices
Symbol
Description
Minimum
Maximum
Unit
VCCA_L
Transceiver high voltage power (left side)
-0.5
3.75
V
VCCA_R
Transceiver high voltage power (right side)
-0.5
3.75
V
VCCHIP_L
Transceiver HIP digital power (left side)
-0.5
1.35
V
VCCHIP_R
Transceiver HIP digital power (right side)
-0.5
1.35
V
VCCR_L
Receiver power (left side)
-0.5
1.35
V
VCCR_R
Receiver power (right side)
-0.5
1.35
V
VCCT_L
Transmitter power (left side)
-0.5
1.35
V
VCCT_R
Transmitter power (right side)
-0.5
1.35
V
VCCL_GXBLn (1)
Transceiver clock power (left side)
-0.5
1.35
V
VCCL_GXBRn (1)
Transceiver clock power (right side)
-0.5
1.35
V
VCCH_GXBLn (1)
Transmitter output buffer power (left side)
-0.5
1.8
V
VCCH_GXBRn (1)
Transmitter output buffer power (right side)
-0.5
1.8
V
Note to Table 1–2:
(1) n = 0, 1, 2, or 3.
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