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參數(shù)資料
| 型號(hào)： | EM78P451 |
| 英文描述： | Dual Advanced Synchronous Rectified Buck MOSFET Drivers with Protection Features; Temperature Range: 0°C to 70°C; Package: 16-QFN |
| 中文描述： | 8位微控制器的通用產(chǎn)品[英文] |
| 文件頁(yè)數(shù)： | 18/52頁(yè) |
| 文件大小： | 1287K |
| 代理商： | EM78P451 |
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EM78P451
OTP ROM
This specification is subject to change without prior notice.
2002/03/01
25
Bit 3 (TM1IE) TM1IE interrupt enable bit.
0: disable TM1IE interrupt
1: enable TM1IE interrupt
Bit 2 (SPIIE) SPI interrupt enable bit.
0: disable SPI interrupt
1: enable SPI interrupt
Bit 1 (EXIE) EXIF interrupt enable bit.
0: disable EXIF interrupt
1: enable EXIF interrupt
Bit 0 (TCIE) TCIF interrupt enable bit.
0: disable TCIF interrupt
1: enable TCIF interrupt
Table 3 Related Status/Data Registers of the SPI Mode
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0X0A
SPIRB/RA
SRB7
SRB6
SRB5
SRB4
SRB3
SRB2
SRB1
SRB0
0x0B
SPIWB/RB
SWB7
SWB6
SWB5
SWB4
SWB3
SWB2
SWB1
SWB0
0x0C
SPIS/RC
0
TM1IF
OD3
OD4
RBFIF
RBF
SPIRB: SPI Read Buffer. Once the serial data is received completely, it will load to SPIRB from
SPISR. The RBF bit and the RBFIF bit in the SPIS register will be set also.
SPIWB: SPI Write Buffer. As a transmitted data is loaded, the SPIS register stands by and start to
shift the data when sensing SCK edge with SSE set to “1”.
SPIS: SPI Status register
TM1IF (bit 4):Timer1 interrupt flag.
OD3 (bit 3):Open-Drain Control bit (P93)
1 = Open-drain enable for SDO,
0 = Open-drain disable for SDO.
OD4 (bit 2):Open Drain-Control bit (P94)
1 = Open-drain enable for SCK,
0 = Open-drain disable for SCK.
RBFIF (bit 1):Read Buffer Full Interrupt flag
1 = Receive is completed, SPIB is full, and an interrupt occurs if enabled.
0 = Receive is ongoing, SPIB is empty.
RBF (bit 0):Read Buffer Full flag
1 = Receive is completed, SPIB is full.
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