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參數(shù)資料
| 型號： | EM6821TQ52B |
| 英文描述： | Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: 0°C to 70°C; Package: 8-EPSOIC |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 39/69頁 |
| 文件大?。?/td> | 852K |
| 代理商： | EM6821TQ52B |
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EM6821
10/01, Revision A/386
Copyright
2001, EM Microelectronic-Marin SA
44
www.emmicroelectronic.com
12. Strobe Output
The Strobe output is used to indicate either the EM6821 reset condition, a write operation on port B (WritePB)
or the sleep mode. The selection is done in register RegLcdCntl1. Per default, the reset condition is output on
the Strobe terminal.
For a port B write operation the strobe signal goes high for half a system clock period. Data can be latched on
the falling edge of the strobe signal. This function is used to indicate when data on port B output terminals is
changing.
The reset signal on the Strobe output is a copy of the internal CPU reset signal. The Strobe pin remains active
high as long as the CPU gets the reset.
Both the reset condition and the port B write operation can be output simultaneously on the Strobe pin.
The strobe output select latches are reset by initial power on reset only.
Table 11.1.1. Strobe Output Selection
StrobeOutSel1
StrobeOutSel0
Strobe
Terminal
Output
00
System
Reset
01
System Reset
and
WritePB
10
WritePB
1
Sleep
12.1 Strobe Register
Table 12.1.1 Register RegLCDCntl1
Bit
Name
power on
value
R/W
Description
3
StrobeOutSel1
0
R/W
Strobe output select
2
StrobeOutSel0
0
R/W
Strobe output select
1
CkTripSel1
0
R/W
LCD multiplier clock select
0
CkTripSel0
0
R/W
LCD multiplier clock select
The CKTripSel1, CKTripSel0 values are reset with every system reset.
Figure 33 . Strobe Output
Reset, WritePB
StrobeOutSel1
StrobeOutSel0
Sleep
WritePB
Reset
3
01
2
1
0
Terminal
Strobe
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