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參數(shù)資料
| 型號： | EM65160 |
| 英文描述： | Synchronous Rectified MOSFET Driver; Temperature Range: -40°C to 85°C; Package: 8-QFN |
| 中文描述： | 圖形STN液晶顯示器驅(qū)動 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 726K |
| 代理商： | EM65160 |
EM65160
160 COM/SEG Dot Matrix LCD Driver
* This specification are subject to be changed without notice.
6/27/2002 (V1.1)
14
Segment mode 2
Table-11 AC Electrical Characteristics Of Segment Mode 2
(VSS = 0V, VDD = +2.5 to +4.5V, V0 = +15 to +42V, Ta = -20~85°C)
Parameter
Symbol
Condition
Min.
Type
Max.
Unit
Shift clock period *1
TWCK
TR,TF≦10ns
125
ns
Shift clock “H” pulse width
TWCKH
51
ns
Shift clock “L” pulse width
TWCKL
51
ns
Data setup time
TDS
30
ns
Data hold time
TDH
40
ns
Latch pulse “H” pulse width
TWLPH
51
ns
Shift clock rise to latch pulse rise time
TLD
0
ns
Shift clock fall to latch pulse fall time
TSL
51
ns
Latch pulse rise to shift clock rise time
TLS
51
ns
Latch pulse fall to shift clock fall time
TLH
51
ns
Input signal rise time *2
TR
50
ns
Input signal fall time
*2
TF
50
ns
Enable setup time
TS
36
ns
/DSPOF removal time
TSD
100
ns
/DSPOF “L” pulse time
TWDL
1.2
μs
Output delay time (1)
TD
CL=15pF
78
ns
Output delay time (2)
TPD1, TPD2
CL=15pF
1.2
μs
Output delay time (3)
TPD3
CL=15pF
1.2
μs
NOTES:
1. Take the cascade connection into consideration.
2. (TWCK – TWCKH – TWCKL) / 2 is maximum in the case of high-speed operation.
Common mode
Table-12 AC Electrical Characteristics Of Common Mode
(VSS = 0V, VDD = +2.5 to +5.5V, V0 = +15 to +42V, Ta = -20~85°C)
Parameter
Symbol
Condition
Min.
Type
Max.
Unit
Shift clock period
TWLP
TR,TF≦20ns
250
ns
VDD=+5.0V±10%
15
ns
Shift clock “H” pulse width
TWLPH
VDD=+2.5V~+4.5V
30
ns
Data setup time
TSU
30
ns
Data hold time
TH
30
ns
Input signal rise time
TR
50
ns
Input signal fall time
TF
50
ns
/DSPOF removal time
TSD
100
ns
/DSPOF “L” pulse time
TWDL
1.2
μs
Output delay time (1)
TDL
CL=15pF
200
ns
Output delay time (2)
TPD1, TPD2
CL=15pF
1.2
μs
Output delay time (3)
TPD3
CL=15pF
1.2
μs
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