參數(shù)資料
型號(hào)： EFM32TG822F32
廠商： Energy Micro
文件頁(yè)數(shù)： 52/136頁(yè)
文件大?。?/td> 0K
描述： IC MCU 32BIT 32KB FLASH 48LQFP
特色產(chǎn)品： EFM32 Tiny Gecko
標(biāo)準(zhǔn)包裝： 1
系列： Tiny Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，DMA，I²S，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 37
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 標(biāo)準(zhǔn)包裝
其它名稱(chēng)： 914-1031-6
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...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
22
www.energymicro.com
__ldrex((volatile char *) 0xFF);
2.3 Exception model
This section describes the exception model.
2.3.1 Exception states
Each exception is in one of the following states:
Inactive
The exception is not active and not pending.
Pending
The exception is waiting to be serviced by the processor.
An interrupt request from a peripheral or from software can change the state
of the corresponding interrupt to pending.
Active
An exception that is being serviced by the processor but has not completed.
Note
An exception handler can interrupt the execution of another
exception handler. In this case both exceptions are in the active
state.
Active and pending
The exception is being serviced by the processor and there is a pending
exception from the same source.
2.3.2 Exception types
The exception types are:
Reset
Reset is invoked on power up or a warm reset. The exception model
treats reset as a special form of exception. When reset is asserted,
the operation of the processor stops, potentially at any point in an
instruction. When reset is deasserted, execution restarts from the
address provided by the reset entry in the vector table. Execution
restarts as privileged execution in Thread mode.
NMI
In the EFM32 devices a NonMaskable Interrupt (NMI) can only be
triggered by software. This is the highest priority exception other than
reset. It is permanently enabled and has a fixed priority of -2. NMIs
cannot be:
masked or prevented from activation by any other exception
preempted by any exception other than Reset.
Hard fault
A hard fault is an exception that occurs because of an error during
exception processing, or because an exception cannot be managed by
any other exception mechanism. Hard faults have a fixed priority of -1,
meaning they have higher priority than any exception with configurable
priority.
Memory management fault
A memory management fault is an exception that occurs because
of a memory protection related fault. The MPU or the fixed memory
protection constraints determines this fault, for both instruction and
data memory transactions. This fault is used to abort instruction
accesses to Execute Never (XN) memory regions, even if the MPU
is disabled.
Bus fault
A bus fault is an exception that occurs because of a memory related
fault for an instruction or data memory transaction. This might be from
an error detected on a bus in the memory system.
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