參數(shù)資料
型號： EFM32TG822F32
廠商： Energy Micro
文件頁數(shù)： 113/136頁
文件大?。?/td> 0K
描述： IC MCU 32BIT 32KB FLASH 48LQFP
特色產(chǎn)品： EFM32 Tiny Gecko
標(biāo)準包裝： 1
系列： Tiny Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，DMA，I²S，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 37
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 4K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 48-TQFP
包裝： 標(biāo)準包裝
其它名稱： 914-1031-6
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
78
www.energymicro.com
ITTE
NE
; Next 3 instructions are conditional
ANDNE
R0, R0, R1
; ANDNE does not update condition flags
ADDSNE R2, R2, #1
; ADDSNE updates condition flags
MOVEQ
R2, R3
; Conditional move
CMP
R0, #9
; Convert R0 hex value (0 to 15) into ASCII
; ('0'-'9', 'A'-'F')
ITE
GT
; Next 2 instructions are conditional
ADDGT
R1, R0, #55
; Convert 0xA -> 'A'
ADDLE
R1, R0, #48
; Convert 0x0 -> '0'
IT
GT
; IT block with only one conditional instruction
ADDGT
R1, R1, #1
; Increment R1 conditionally
ITTEE
EQ
; Next 4 instructions are conditional
MOVEQ
R0, R1
; Conditional move
ADDEQ
R2, R2, #10
; Conditional add
ANDNE
R3, R3, #1
; Conditional AND
BNE.W
dloop
; Branch instruction can only be used in the last
; instruction of an IT block
IT
NE
; Next instruction is conditional
ADD
R0, R0, R1
; Syntax error: no condition code used in IT block
3.9.4 TBB and TBH
Table Branch Byte and Table Branch Halfword.
3.9.4.1 Syntax
TBB [Rn, Rm]
TBH [Rn, Rm, LSL #1]
where:
Rn
is the register containing the address of the table of branch lengths.
If Rn is PC, then the address of the table is the address of the byte immediately following the TBB
or TBH instruction.
Rm
is the index register. This contains an index into the table. For halfword tables, LSL #1 doubles
the value in Rm to form the right offset into the table.
3.9.4.2 Operation
These instructions cause a PC#relative forward branch using a table of single byte offsets for TBB, or
halfword offsets for TBH. Rn provides a pointer to the table, and Rm supplies an index into the table. For
TBB
the branch offset is twice the unsigned value of the byte returned from the table. and for TBH the
branch offset is twice the unsigned value of the halfword returned from the table. The branch occurs to
the address at that offset from the address of the byte immediately after the TBB or TBH instruction.
3.9.4.3 Restrictions
The restrictions are:
Rn must not be SP
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