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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | EFM32TG210F32 |
| 寤犲晢锛� | Energy Micro |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/136闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | MCU 32BIT 32KB FLASH 32-QFN |
| 鐗硅壊鐢�(ch菐n)鍝侊細 | EFM32 Tiny Gecko |
| 妯欐簴鍖呰锛� | 1 |
| 绯诲垪锛� | Tiny Gecko |
| 鏍稿績铏曠悊鍣細 | ARM? Cortex?-M3 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 32MHz |
| 閫ｉ€氭€э細 | EBI/EMI锛孖²C锛孖rDA锛屾櫤鑳藉崱锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | 娆犲妾㈡脯/寰�(f霉)浣�锛孌MA锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 24 |
| 绋嬪簭瀛樺劜鍣ㄥ閲忥細 | 32KB锛�32K x 8锛� |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 4K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 3.8 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 4x12b锛孌/A 1x12b |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 32-VQFN 瑁搁湶鐒婄洡 |
| 鍖呰锛� | 妯欐簴鍖呰 |
| 鍏跺畠鍚嶇ū锛� | 914-1034-6 |
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...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
105
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3Active bits, read as 1 if the exception is active, or as 0 if it is not active. You can write to these bits to change the active status
of the exceptions, but see the Caution in this section.
If you disable a system handler and the corresponding fault occurs, the processor treats the fault as
a hard fault.
You can write to this register to change the pending or active status of system exceptions. An OS kernel
can write to the active bits to perform a context switch that changes the current exception type.
Caution
Software that changes the value of an active bit in this register without correct adjustment to
the stacked content can cause the processor to generate a fault exception. Ensure software that
writes to this register retains and subsequently restores the current active status.
After you have enabled the system handlers, if you have to change the value of a bit in this
register you must use a read-modify-write procedure to ensure that you change only the required
bit.
4.3.11 Configurable Fault Status Register
The CFSR indicates the cause of a memory management fault, bus fault, or usage fault. See the register
summary in Table 4.12 (p. 94) for its attributes. The bit assignments are:
Mem ory Managem ent
Fault St at us Regist er
31
16 15
8 7
0
Usage Fault St at us Regist er
Bus Fault St at us
Regist er
UFSR
BFSR
MMFSR
The following subsections describe the subregisters that make up the CFSR:
The CFSR is byte accessible. You can access the CFSR or its subregisters as follows:
access the complete CFSR with a word access to 0xE000ED28
access the MMFSR with a byte access to 0xE000ED28
access the MMFSR and BFSR with a halfword access to 0xE000ED28
access the BFSR with a byte access to 0xE000ED29
access the UFSR with a halfword access to 0xE000ED2A.
4.3.11.1 Memory Management Fault Status Register
The flags in the MMFSR indicate the cause of memory access faults. The bit assignments are:
鐩搁棞(gu膩n)PDF璩囨枡 |
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| MC68HC11F1CFN3 | IC MCU 512 EEPROM 3MHZ 68-PLCC |
| MC68HC11F1CFN4 | IC MCU 512 EEPROM 4MHZ 68-PLCC |
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| EFM32TG210F32-QFN32T | 鍒堕€犲晢:Energy Micro AS 鍔熻兘鎻忚堪:32 BIT ARM MPU, TINY GECKO - Trays |
| EFM32TG210F32-QFN32-T | 鍒堕€犲晢:Energy Micro AS 鍔熻兘鎻忚堪:IC MCU 32BIT 32KB FLASH 32QFN |
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