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參數(shù)資料
| 型號(hào)： | EDX5116ABSE-3B-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 512M bits XDR DRAM (32M words ?16 bits) |
| 中文描述： | 32M X 16 RAMBUS, PBGA104 |
| 封裝： | LEAD FREE, FBGA-104 |
| 文件頁(yè)數(shù)： | 37/78頁(yè) |
| 文件大小： | 3611K |
| 代理商： | EDX5116ABSE-3B-E |
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Preliminary Data Sheet E0643E30 (Ver. 3.0)
37
EDX5116ABSE
Figure 24
Refresh High (REFH) Row Register
Figure 25
Refresh Middle (REFM) Row Register
Figure 26
Refresh Low (REFL) Row Register
Figure 27
IO Configuration (IOCFG) Register
7
6
5
4
3
2
1
0
Read/write register
REFH[7:0] resets to 00000000
2
R[18:16]
reserved
reserved - Refresh row field.
This field contains the high-order bits of the row address that will
be refreshed during the next refresh interval. This row address
will be incremented after a REFI command for auto-refresh, or
when the BANK[2:0] field for the REFB register equals the max-
imum bank address for self-refresh.
Refresh High Row Register
SADR[7:0]: 00001001
2
7
6
5
4
3
2
R[11:8]
1
0
Read/write register
REFM[7:0] resets to 00000000
2
R[11:8] - Refresh row field.
This field contains the middle-order bits of the row address that
will be refreshed during the next refresh interval. This row
address will be incremented after a REFI command for auto-
refresh, or when the BANK[2:0] field for the REFB register
equals the maximum bank address for self-refresh.
Refresh Middle Row Register
SADR[7:0]: 00001010
2
reserved
7
6
5
4
3
2
1
0
Read/write register
REFL[7:0] resets to 00000000
2
R[7:0]
R[7:0] - Refresh row field.
This field contains the low-order bits of the row address that will
be refreshed during the next refresh interval. This row address
will be incremented after a REFI command for auto-refresh, or
when the BANK[2:0] field for the REFB register equals the max-
imum bank address for self-refresh.
Refresh Low Row Register
SADR[7:0]: 00001011
2
7
6
5
4
3
2
1
0
Read/write register
IOCFG[7:0] resets to 00000000
2
ODF[1:0]
ODF[1:0] - Overdrive Function field.
00 - Nominal V
OSW,DQ
range
01 - reserved
10 - reserved
11 - reserved
IO Configuration Register
SADR[7:0]: 00001111
2
reserved
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| EDX5116ABSE-3A-E | 512M bits XDR DRAM (32M words ?16 bits) |
| EDX5116ABSE | 512M bits XDR DRAM (32M words ?16 bits) |
| EDX5116ABSE-3C-E | 512M bits XDR DRAM (32M words ?16 bits) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDX5116ABSE-3C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits XDR DRAM (32M words ?16 bits) |
| EDX5116ABSE-4C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits XDR DRAM (32M words ?16 bits) |
| EDX5116ACSE | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits XDR? DRAM |
| EDX5116ACSE-3A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits XDR? DRAM |
| EDX5116ACSE-3B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512M bits XDR? DRAM |
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