參數(shù)資料
型號: EDS2532AABJ-6B
廠商: Elpida Memory, Inc.
英文描述: 256M bits SDRAM (8M words ?32 bits)
中文描述: 256M位的SDRAM(800萬字?32位)
文件頁數(shù): 5/48頁
文件大小: 614K
代理商: EDS2532AABJ-6B
EDS2532AABJ-6B
Data Sheet E0509E30 (Ver. 3.0)
5
DC Characteristics 1 (TA = 0 to +70
°
C, VDD, VDDQ = 3.3V ± 0.3V, VSS, VSSQ = 0V)
Parameter
/CAS latency
Symbol
Grade
max.
Unit
Test condition
Notes
Operating current
IDD1
135
mA
Burst length = 1
tRC = tRC (min.)
CKE = VIL,
tCK = tCK (min.)
1, 2, 3
Standby current in power down
IDD2P
3
mA
6
Standby current in power down
(input signal stable)
IDD2PS
2
mA
CKE = VIL, tCK =
7
Standby current in non power down
IDD2N
20
mA
CKE, /CS = VIH,
tCK = tCK (min.)
CKE = VIH, tCK =
,
/CS = VIH
CKE = VIL,
tCK = tCK (min.)
4
Standby current in non power down
(input signal stable)
IDD2NS
9
mA
8
Active standby current in power down
IDD3P
4
mA
1, 2, 6
Active standby current in power down
(input signal stable)
IDD3PS
3
mA
CKE = VIL, tCK =
2, 7
Active standby current in non power down IDD3N
50
mA
CKE, /CS = VIH,
tCK = tCK (min.)
CKE = VIH, tCK =
,
/CS = VIH
tCK = tCK (min.),
BL = 4
1, 2, 4
Active standby current in non power down
(input signal stable)
IDD3NS
40
mA
2, 8
Burst operating current
IDD4
180
mA
1, 2, 5
Refresh current
IDD5
300
mA
tRC = tRC (min.)
3
Self refresh current
IDD6
3
mA
VIH
VDD – 0.2V
VIL
0.2V
VIH
VDD – 0.2V
VIL
0.2V
Self refresh current
(L-version)
Notes: 1. IDD depends on output load condition when the device is selected. IDD (max.) is specified at the output
open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CLK operating current.
7. After power down mode, no CLK operating current.
8. Input signals are VIH or VIL fixed.
IDD6
-XXL
1
mA
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