參數(shù)資料
型號: EDS2516CDTA-75-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 256M bits SDRAM (16M words x 16 bits)
中文描述: 16M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: ROHS COMPLIANT, PLASTIC, TSOP2-54
文件頁數(shù): 37/50頁
文件大?。?/td> 703K
代理商: EDS2516CDTA-75-E
EDS2516CDTA
Prelimimary Data Sheet E0545E40 (Ver. 4.0)
37
Write command to Precharge command interval (same bank)
When the precharge command is executed for the same bank as the write command that preceded it, the minimum
interval between the two commands is 1 clock. However, if the burst write operation is unfinished, the input data
must be masked by means of UDQM and LDQM for assurance of the clock defined by tDPL.
CLK
in A0
in A1
in A2
Command
DQ
WRIT
PRE/PALL
UDQM
LDQM
tDPL
WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To stop write operation))
CLK
in A0
in A1
in A2
Command
DQ
WRIT
PRE/PALL
in A3
UDQM
LDQM
tDPL
WRITE to PRECHARGE Command Interval (same bank) (BL = 4 (To write all data))
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