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參數(shù)資料
| 型號： | EDS2516CDTA-75-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 256M bits SDRAM (16M words x 16 bits) |
| 中文描述： | 16M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54 |
| 封裝： | ROHS COMPLIANT, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 14/50頁 |
| 文件大小： | 703K |
| 代理商： | EDS2516CDTA-75-E |
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EDS2516CDTA
Prelimimary Data Sheet E0545E40 (Ver. 4.0)
14
Row address strobe and bank activate [ACT]
This command activates the bank that is selected by BA0, BA1 and determines the row address (A0 to A12). (See
Bank Select Signal Table)
Precharge selected bank [PRE]
This command starts precharge operation for the bank selected by BA0, BA1. (See Bank Select Signal Table)
[Bank Select Signal Table]
BA0
BA1
Bank 0
L
L
Bank 1
H
L
Bank 2
L
H
Bank 3
H
H
Remark: H: VIH. L: VIL.
Precharge all banks [PALL]
This command starts a precharge operation for all banks.
Refresh [REF/SELF]
This command starts the refresh operation. There are two types of refresh operation, the one is auto-refresh, and
the other is self-refresh. For details, refer to the CKE truth table section.
Mode register set [MRS]
The SDRAM has a mode register that defines how it operates. The mode register is specified by the address pins
(A0 to BA0 and BA1) at the mode register set cycle. For details, refer to the Mode Register Configuration. After
power on, the contents of the mode register are undefined, execute the mode register set command to set up the
mode register.
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