參數(shù)資料
型號(hào): EDL1216CASA
廠商: Elpida Memory, Inc.
英文描述: 128M bits Mobile RAM
中文描述: 128M的內(nèi)存位移動(dòng)
文件頁(yè)數(shù): 32/59頁(yè)
文件大?。?/td> 479K
代理商: EDL1216CASA
EDL1216AASA
Data Sheet E0196E30 (Ver. 3.0)
32
Precharge Termination in WRITE Cycle
During a write cycle, the burst write operation is terminated by a precharge command. When the precharge
command is issued, the burst write operation is terminated and precharge starts. The same bank can be activated
again after tRP from the precharge command. To issue a precharge command, tRAS must be satisfied.
The write data written prior to the precharge command will be correctly stored. However, invalid data may be written
at the same clock as the precharge command. To prevent this from happening, DQM must be high at the same
clock as the precharge command. This will mask the invalid data.
WRITE
CLK
T0
T2
T1
T3
T4
T5
T6
T7
Burst length = X, /CAS latency = 3
DQ
Command
D1
D2
D3
ACT
DQM
t
RP
PRE
Hi-Z
D5
T8
D4
(t
RAS
must be satisfied)
Precharge Termination in WRITE Cycle
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