參數(shù)資料
型號(hào): EDE5104GBSA-5A-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: RxxPxx Series - Econoline Unregulated DC-DC Converters; Input Voltage (Vdc): 15V; Output Voltage (Vdc): 3.3V; Power: 1W; EN 60950 certified, rated for 250VAC; UL-60950-1 / CSA C22.2 certified; 5.2kVDC Isolation for 1 Minute; Optional Continuous Short Circuit Protected; 2 Chamber Transformer System; UL94V-0 Package Material; Efficiency to 80%
中文描述: 128M X 4 DDR DRAM, 0.5 ns, PBGA64
封裝: MICRO, BGA-64
文件頁數(shù): 13/66頁
文件大?。?/td> 697K
代理商: EDE5104GBSA-5A-E
EDE5104ABSE, EDE5108ABSE, EDE5116ABSE
Data Sheet E0323E90 (Ver. 9.0)
13
-5C
-4A
Frequency (Mbps)
533
max.
400
Parameter
Symbol min.
min.
max.
Unit
Notes
Active bank A to active bank B
command period
(EDE5104AB, EDE5108AB)
(EDE5116AB)
tRRD
7.5
7.5
ns
tRRD
10
10
ns
Write recovery time
Auto precharge write recovery +
precharge time
Internal write to read command delay
Internal read to precharge command
delay
Exit self refresh to a non-read command tXSNR
tWR
15
(tWR/tCK)+
(tRP/tCK)
7.5
15
(tWR/tCK)+
(tRP/tCK)
10
ns
tDAL
tCK
1
tWTR
ns
tRTP
7.5
7.5
ns
tRFC + 10
tRFC + 10
ns
Exit self refresh to a read command
Exit precharge power down to any non-
read command
Exit active power down to read
command
Exit active power down to read
command
(slow exit/low power mode)
CKE minimum pulse width (high and
low pulse width)
Output impedance test driver delay
Auto refresh to active/auto refresh
command time
Average periodic refresh interval
Minimum time clocks remains ON after
CKE asynchronously drops low
Notes: 1. For each of the terms above, if not already an integer, round to the next higher integer.
2. AL: Additive Latency.
3. MRS A12 bit defines which active power down exit timing to be applied.
4. The figures of Input Waveform Timing 1 and 2 are referenced from the input signal crossing at the
VIH(AC) level for a rising signal and VIL(AC) for a falling signal applied to the device under test.
5. The figures of Input Waveform Timing 1 and 2 are referenced from the input signal crossing at the
VIH(DC) level for a rising signal and VIL(DC) for a falling signal applied to the device under test.
tXSRD
200
200
tCK
tXP
2
2
tCK
tXARD
2
2
tCK
3
tXARDS 6
AL
6
AL
tCK
2, 3
tCKE
3
3
tCK
tOIT
0
12
0
12
ns
tRFC
105
105
ns
tREFI
7.8
7.8
μ
s
tDELAY tIS + tCK + tIH
tIS + tCK + tIH
ns
DQS
/DQS
tDS
tDH
tDS
tDH
VDDQ
VIH (AC)(min.)
VIH (DC)(min.)
VREF
VIL (DC)(max.)
VIL (AC)(max.)
VSS
CK
/CK
tIS
tIH
tIS
tIH
VDDQ
VIH (AC)(min.)
VIH (DC)(min.)
VREF
VIL (DC)(max.)
VIL (AC)(max.)
VSS
Input Waveform Timing 1 (tDS, tDH)
Input Waveform Timing 2 (tIS, tIH)
相關(guān)PDF資料
PDF描述
EDE5108GBSA-5A-E INNOLINE: Rxx-100_150A - Compact High Voltage Power Supplies - 5 Watt in Low Profile DIP24 Package - 3000VDC Isolation - Remote Voltage Programming by External Voltage or Resistance - Continuous Short Circuit Protection - Cascadeable to generate Output Voltages of up to 420VDC
EDE5104GBSA 512M bits DDR-II SDRAM
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