參數(shù)資料
型號(hào)： EDD1232ABBH-5C-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 128M bits DDR SDRAM
中文描述： 4M X 32 DDR DRAM, 0.7 ns, PBGA144
封裝： ROHS COMPLIANT, FBGA-144
文件頁(yè)數(shù)： 38/51頁(yè)
文件大?。?/td> 518K
代理商： EDD1232ABBH-5C-E
EDD1232ABBH
Data Sheet E0874E40 (Ver. 4.0)
38
Bank active command interval
Destination row of the consecutive ACT
command
Bank
address
Row address
State
Operation
Two successive ACT commands can be issued at tRC interval. In between two
successive ACT operations, precharge command should be executed.
Precharge the bank. tRP after the precharge command, the consecutive ACT
command can be issued.
1. Same
Any
ACTIVE
2. Different
Any
ACTIVE
IDLE
tRRD after an ACT command, the next ACT command can be issued.
CK
/CK
Command
BA
tRC
Address
ACTV
tRRD
Bank0
Active
Bank3
Active
Bank0
Precharge
Bank0
Active
PRE
ACT
ROW: 0
NOP
NOP
NOP
ACT
ROW: 1
ROW: 0
Bank Active to Bank Active
Mode register set to Bank-active command interval
The interval between setting the mode register and executing a bank-active command must be no less than tMRD.
CK
/CK
Command
Address
NOP
NOP
MRS
ACT
tMRD
Mode Register Set
Bank3
Active
CODE
BS and ROW
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDD1232ACBH 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM
EDD1232ACBH-5B-F 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM
EDD1232ACBH-6B 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM
EDD1232ACBH-6B-F 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM
ED-D15TF-K 制造商:IXYS Corporation 功能描述:
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