- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384277 > EDD2504AKTA-7A (ELPIDA MEMORY INC) 256M bits DDR SDRAM (64M words x 4 bits) PDF資料下載
參數(shù)資料
| 型號(hào)： | EDD2504AKTA-7A |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 256M bits DDR SDRAM (64M words x 4 bits) |
| 中文描述： | 64M X 4 DDR DRAM, 0.75 ns, PDSO66 |
| 封裝： | PLASTIC, TSOP2-66 |
| 文件頁數(shù)： | 1/49頁 |
| 文件大小： | 441K |
| 代理商： | EDD2504AKTA-7A |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
Document No. E0457E10 (Ver. 1.0)
Date Published January 2004 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2004
DATA SHEET
256M bits DDR SDRAM
EDD2504AKTA (64M words
×
4 bits)
Description
The EDD2504AK is a 256M bits Double Data Rate
(DDR) SDRAM organized as 16,777,216 words
×
4 bits
×
4 banks. Read and write operations are performed at
the cross points of the CK and the /CK. This high-
speed data transfer is realized by the 2 bits prefetch-
pipelined architecture. Data strobe (DQS) both for
read and write are available for high speed and reliable
data bus design. By setting extended mode register,
the on-chip Delay Locked Loop (DLL) can be set
enable or disable. It is packaged in 66-pin plastic
TSOP (II).
Features
Power supply : VDDQ = 2.5V
±
0.2V
: VDD = 2.5V
±
0.2V
Data rate: 333Mbps/266Mbps (max.)
Double Data Rate architecture; two data transfers per
clock cycle
Bi-directional, data strobe (DQS) is transmitted
/received with data, to be used in capturing data at
the receiver
Data inputs, outputs, and DM are synchronized with
DQS
4 internal banks for concurrent operation
DQS is edge aligned with data for READs; center
aligned with data for WRITEs
Differential clock inputs (CK and /CK)
DLL aligns DQ and DQS transitions with CK
transitions
Commands entered on each positive CK edge; data
and data mask referenced to both edges of DQS
Data mask (DM) for write data
Auto precharge option for each burst access
SSTL_2 compatible I/O
Programmable burst length (BL): 2, 4, 8
Programmable /CAS latency (CL): 2, 2.5
Programmable output driver strength: normal/weak
Refresh cycles: 8192 refresh cycles/64ms
7.8
μ
s maximum average periodic refresh interval
2 variations of refresh
Auto refresh
Self refresh
Pin Configurations
/xxx indicates active low signal.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
VDD
NC
VDDQ
NC
DQ0
VSSQ
NC
NC
VDDQ
NC
DQ1
VSSQ
NC
NC
VDDQ
NC
NC
VDD
NC
NC
/WE
/CAS
/RAS
/CS
NC
BA0
BA1
A10(AP)
A0
A1
A2
A3
VDD
VSS
NC
VSSQ
NC
DQ3
VDDQ
NC
NC
VSSQ
NC
DQ2
VDDQ
NC
NC
VSSQ
DQS
NC
VREF
VSS
DM
/CK
CK
CKE
NC
A12
A11
A9
A8
A7
A6
A5
A4
VSS
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
(Top view)
Address input
Bank select address
Data-input/output
Input and output data strobe
Chip select
Row address strobe command
Column address strobe command
Write enable
Input mask
Clock input
Differential clock input
Clock enable
Input reference voltage
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
A0 to A12
BA0, BA1
DQ0 to DQ3
DQS
/CS
/RAS
/CAS
/WE
DM
CK
/CK
CKE
VREF
VDD
VSS
VDDQ
VSSQ
NC
66-pin Plastic TSOP(II)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EDD2504AKTA-7B | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-7B-E | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-E | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2508AKTA-5-E | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
| EDD2508AKTA-5B-E | 256M bits DDR SDRAM (32M words x 8 bits, DDR400) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDD2504AKTA-7A-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-7B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-7B-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2508AETA | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256M bits DDR SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。