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參數(shù)資料
| 型號： | EDD1232AAFA-7A-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M bits DDR SDRAM (4M words x 32 bits) |
| 中文描述： | 4M X 32 DDR DRAM, 0.75 ns, PQFP100 |
| 封裝： | ROHS COMPLIANT, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 33/50頁 |
| 文件大?。?/td> | 621K |
| 代理商： | EDD1232AAFA-7A-E |
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EDD1232AABH
Data Sheet E0533E50 (Ver. 5.0)
33
A Write command to the consecutive Read command interval: To complete the burst operation
Destination row of the consecutive read
command
Bank
address
To complete the burst operation, the consecutive read command should be
performed tWRD (= BL/ 2 + 3) after the write command.
Precharge the bank tWPD after the preceding write command. tRP after the
precharge command, issue the ACT command. tRCDRD after the ACT command,
the consecutive read command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
To complete a burst operation, the consecutive read command should be
performed tWRD (= BL/ 2 + 3) after the write command.
Precharge the bank independently of the preceding write operation. tRP after the
precharge command, issue the ACT command. tRCDRD after the ACT command,
the consecutive read command can be issued.
Row address State
Operation
1. Same
Same
ACTIVE
2. Same
Different
—
3. Different
Any
ACTIVE
IDLE
t1
t0
t2
t3
t4
t5
t6
t7
t8
t9
in0
in1
in2
in3
out2
out3
out0
out1
CK
/CK
DM
DQ
Command
BL = 4
CL = 2
tWRD (min)
tWTR*
DQS
INPUT
OUTPUT
BL/2 + 3 cycle
WRIT
NOP
NOP
READ
Note: tWTR is referenced from the first positive CK edge after the last desired data in pair tWTR.
WRITE to READ Command Interval
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PDF描述 |
|---|---|
| EDD1232AABH-7A-E | GT 3C 3#16S PIN PLUG |
| EDD1232ABBH | 128M bits DDR SDRAM |
| EDD1232ABBH-5C-E | 128M bits DDR SDRAM |
| EDD2504AKTA-6B-E | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-7A-E | 256M bits DDR SDRAM (64M words x 4 bits) |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDD1232ABBH | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ABBH-5C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ACBH | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ACBH-5B-F | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ACBH-6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
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