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參數(shù)資料
| 型號： | EDD1232AAFA-7A-E |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 128M bits DDR SDRAM (4M words x 32 bits) |
| 中文描述： | 4M X 32 DDR DRAM, 0.75 ns, PQFP100 |
| 封裝： | ROHS COMPLIANT, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 27/50頁 |
| 文件大小： | 621K |
| 代理商： | EDD1232AAFA-7A-E |
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EDD1232AABH
Data Sheet E0533E50 (Ver. 5.0)
27
Auto Precharge
Read with auto-precharge
The precharge is automatically performed after completing a read operation. The precharge starts tRPD (BL/2)
cycle after READA command input.
tRAP specification for READA allows a read command with auto precharge to be
issued to a bank that has been activated (opened) but has not yet satisfied the tRAS (min) specification. A column
command to the other active bank can be issued the next cycle after the last data output. Read with auto-precharge
command does not limit row commands execution for other bank. Refer to ‘Function truth table and related
note(Notes.*14).
out0
out1
out2
out3
CK
/CK
DQ
Command
tRP (min)
tRAP (min) = tRCDRD (min)
ACT
Note: Internal auto-precharge starts at the timing indicated by " ".
NOP
2 cycles (= BL/2)
READA
ACT
DQS
tAC,tDQSCK
tRPD
Read with auto-precharge
Write with auto-precharge
The precharge is automatically performed after completing a burst write operation. The precharge operation is
started (BL/ 2 + 4) cycles after WRITA command issued. A column command to the other banks can be issued the
next cycle after the internal precharge command issued. Write with auto-precharge command does not limit row
commands execution for other bank. Refer to the ‘Read with Auto-Precharge Enabled, Write with Auto-Precharge
Enabled’ section. Refer to ‘Function truth table and related note (Notes.*14).
in1
in2
in3
in4
CK
/CK
DQ
Command
DM
tRAS (min)
tRCDWR (min)
tRP
DQS
ACT
WRITA
ACT
BL/2 + 4 cycles
Note: Internal auto-precharge starts at the timing indicated by " ".
BL = 4
NOP
NOP
Burst Write (BL = 4)
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PDF描述 |
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| EDD1232AABH-7A-E | GT 3C 3#16S PIN PLUG |
| EDD1232ABBH | 128M bits DDR SDRAM |
| EDD1232ABBH-5C-E | 128M bits DDR SDRAM |
| EDD2504AKTA-6B-E | 256M bits DDR SDRAM (64M words x 4 bits) |
| EDD2504AKTA-7A-E | 256M bits DDR SDRAM (64M words x 4 bits) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EDD1232ABBH | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ABBH-5C-E | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ACBH | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ACBH-5B-F | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
| EDD1232ACBH-6B | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits DDR SDRAM |
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