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參數(shù)資料
| 型號： | E720-EDGE720 |
| 英文描述： | 500 MHz Pin Electronics Driver. Window Comparator. and Load |
| 中文描述： | 500兆赫引腳電子驅(qū)動器。窗口比較器。和負(fù)載 |
| 文件頁數(shù)： | 6/31頁 |
| 文件大?。?/td> | 221K |
| 代理商： | E720-EDGE720 |
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Edge720
TEST AND MEASUREMENT PRODUCTS
Revision 4 / September 24, 2002
Circuit Description (continued)
Load Circuit Commutating Voltage Accuracy
The accuracy of the load circuit commutating voltage is
dependent upon the commutating buffer. The accuracy
of this buffer is quantified by three parameters. These
parameters are all specified in the “Commutating Voltage
Accuracy” section of the datasheet and are as follows:
1.
Offset Voltage
2.
Gain Error
3.
Linearity Error
These parameters affect the ideal voltage transfer
characteristic of the commutating buffer in the same
manner as they affect the ideal transfer characteristic of
the driver circuit. Please refer to the Driver DC Accuracy
section for a detailed description of these effects.
Additional Features
Thermal Monitor
The Edge720 features an on-chip string of five thermal
diodes that allow for a method of accurate die temperature
measurement (see Figure 21). Using an external bias
current of 100
A injected through the string, the Edge720
junction temperature follows the equation:
Tj[C] = {ANODE – CATHODE )/ 5 – .7752} / (–.0018)
Figure 21. Edge720 Thermal Diode String
Low Leakage Pin Electronics Implementation
The Edge720 is capable of supporting a total DCL (driver
+ comparator + load) leakage of less than 100 nA. This
extremely low leakage current capability enables the
Edge720 to be ideally suited for relay-less ATE system
architecture. In order to realize low leakage functionality,
the following conditions must be met:
1.
Driver circuit must be in IPD mode (IPD_D = 1)
2.
Comparator circuit must be in IPD mode
(IPD_C = 1)
3.
Load circuit must be disabled (high impedance
mode: LD_EN < LD_EN*,
ISC_IN = ISK_IN = 0 mA)
Connectivity
The Edge720 can be easily combined with other Edge
devices to create simple, yet high performance solutions
to many challenges in ATE. One possible ATE solution
that consists of the Edge6420 DAC, Edge4707B PMU,
and Edge720 DCL is shown in Figure 24.
Power Sequencing
In order to avoid the possibility of latch-up, the following
power-up requirements must be satisfied:
1.
VEE
≤ GND ≤ VCC at all times
2.
VEE
≤ All Inputs ≤ VCC
The following power sequencing can be used as a guideline
when using the Edge720:
Power Up Sequence
1. VEE
2. VCC
3. Analog Inputs
4. Digital Inputs
Power Down Sequence
1. Digital Inputs
2. Analog Inputs
3. VCC
4. VEE
ANODE
CATHODE
Temperature Coefficient = –9 mV / C
Bias Current
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