![](http://datasheet.mmic.net.cn/150000/E720-EDGE720_datasheet_5001779/E720-EDGE720_9.png)
9
www .semtech.com
TEST AND MEASUREMENT PRODUCTS
Edge720
Revision 4 / September 24, 2002
Comparator Circuit Description
Introduction
The Edge720 features two on-chip comparators that are
connected to form a window comparator. This window
comparator can be used to determine whether an input
signal at VINP is within a threshold window determined by
the CVA and CVB pins. The comparator on the Edge720
is a variant of the comparator on the Edge710 and has
been specifically designed to improve resistance to
breakdown at super voltage levels. A block diagram of
the Edge720’s window comparator circuit can be seen in
Figure 9.
Figure 9. Block Diagram of the Edge720’s
Window Comparator
Comparator Inputs
The comparator circuit features two digital, three analog,
and three power supply inputs. The digital inputs, IPD_C
and SUPERV, can be used to place the comparator into
input power down mode. The analog inputs are CVA, CVB,
and VINP. CVA and CVB set the comparator thresholds,
while VINP is the comparator input voltage signal. The
comparator output power supply input is PECL.
The
functionality of all of these inputs is described later in this
section.
Comparator Input Power Down
The IPD_C and SUPERV pins are TTL compatible inputs
that can be used to place the Edge720’s window
comparator circuit into “Input Power Down” mode. IPD_C
and SUPERV functionality is described in Table 4.
Table 4. IPD_C Functionality
When the comparator is placed in IPD mode, the
comparator input, VINP, can be safely exposed to super
voltage levels.
Since the comparator circuit is not
functional in this mode, it is recommended that IPD_C be
connected to GND when not in use. In addition to the
input power down characteristics of VINP, SUPERV and
IPD_C control switches that internally connect the ISK_IN
and ISC_IN inputs to protect the load circuit.
Comparator Analog Inputs
VINP is a high impedance analog voltage input pin that is
used to read a desired voltage signal. VINP is internally
connected to the non-inverting inputs of both on-chip
comparators (as seen in Figure 9). VINP is also connected
to two internal over-voltage diodes that are connected to
VCC and VEE. These diodes are sized to handle up to
100 mA of current. CVA and CVB are high impedance
analog voltage inputs that are used to set the threshold
levels of the window comparator. Although CVA(B) are
high speed inputs, they do not require bypassing as long
as the source impedance is not inductive (which can
happen with a long, narrow PCB trace). If needed, small
(
≈100 pF) capacitors can be connected between the
CVA(B) pins and GND to ensure stability and low noise.
Circuit Description (continued)
CVA
VINP
CVB
QA*
QA
IPD_C
SUPERV
PECL
QB
QB*
VEE
VCC
V
R
E
P
U
SC
_
D
P
In
o
it
a
r
e
p
O
00
l
a
m
r
o
N
01
e
d
o
m
D
P
I
10
e
d
o
m
D
P
I
11
e
d
o
m
D
P
I