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參數(shù)資料
| 型號： | DZPD6722VCCE |
| 廠商： | INTEL CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | ISA-to-PC-Card (PCMCIA) Controllers |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP208 |
| 封裝： | LQFP-208 |
| 文件頁數(shù)： | 32/138頁 |
| 文件大?。?/td> | 723K |
| 代理商： | DZPD6722VCCE |
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PD6710/
’
22
—
ISA-to-PC-Card (PCMCIA) Controllers
32
Datasheet
IRQ15/RI_OUT* is programmed as RI_OUT* by programming the IRQ15 Is RI Out bit (
Misc
Control 2
register 1Eh bit 7) to
‘
1
’
. Then if a particular socket supporting a modem is to have its
BVD1/-STSCHG/-RI pin passed to the IRQ15/RI_OUT* pin, that socket
’
s Ring Indicate Enable
bit (
Interrupt and General Control
register 03h bit 7) should be set to
‘
1
’
.
When the PD67XX is configured this way, a low level at the BVD1/-STSCHG/-RI pin on an I/O
interfaced PC Card will cause the IRQ15/RI_OUT* signal to become active-low (because it is
intended to be connected to an SMI* or NMI* input on the system processor or core logic). To
prevent multiple SMI or NMI interrupts from occurring on one ring condition, the IRQ15/
RI_OUT* pin remains low until ISA bus activity resumes, indicated by the resumption of ISA bus
memory or I/O reads or writes.
4.1.5.3
IRQ9 as DACK* and IRQ10 as DRQ
When a PD6722 is to be used for DMA support, IRQ9 is programmed as a DACK* input from an
ISA bus DACK* signal selected by the system designer. Similarly, IRQ10 is programmed as an
active-high DRQ output to the ISA bus and should be connected to the system bus DRQ signal
corresponding to that used for DACK*.
IRQ9 and IRQ10 are thus redefined for DMA cycle support by the setting of the DMA System bit
(
Misc Control 2
register 1Eh, bit 6) to
‘
1
’
. Setting the DMA System bit redefines these ISA
interface signals but does not cause DMA to a card to be enabled.
4.1.6
General-Purpose Strobe Feature
The PD6722 has capability to use two pins as general-purpose strobes. This is a feature that causes
a pin programmed as a general-purpose strobe to appear in software as an extended register in the
PD6722 register set, while in reality accesses to this extended register cause the general-purpose
strobe pin to go active during the register access. The strobe can be programmed to activate on
reads or writes to this virtual extended register, allowing straightforward single-chip
implementation of an 8-bit general purpose read or write port.
“
Using GPSTB Pins for External Port Control (PD6722 only)
”
on page 91
provides detailed
information on how this port can be used.
4.1.7
Voltage Sense Pins
The PD6710 provides a single pin to detect 5 V or 3.3 V on pin 57 of the PC Card.
The PD6722 can be simply configured for dual-socket VS1 and VS2 detection with an external
read port consisting of half of a
’
244 buffer or other similar device, enabled by the B_GPSTB pin
programmed as a read port.
“
VS1# and VS2# Voltage Detection
”
on page 95
provides detailed information on the
programming model for VS1 and VS2 detection and how connections are made to achieve this
functionality.
4.1.8
PD67XX Power Management
To provide the longest possible battery life, the PD67XX provides many power management
features, including Low-Power Dynamic mode, Suspend mode, and control of PC Card socket
power.
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