參數(shù)資料
型號: DTMFDECODER-RD
廠商: Silicon Laboratories Inc
文件頁數(shù): 123/178頁
文件大?。?/td> 0K
描述: KIT REF DESIGN DTMF DECODER
應(yīng)用說明: DTMF Decoder Ref Design AppNote
標準包裝: 1
主要目的: 電信,DTMF 解碼器
嵌入式:
已用 IC / 零件: C8051F300
主要屬性: 8kHz 采樣速率模數(shù)轉(zhuǎn)換器
次要屬性: 16 個 Goertzel 濾波器
已供物品: 板,軟件
產(chǎn)品目錄頁面: 627 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱: 336-1283
Rev. 2.9
49
C8051F300/1/2/3/4/5
6.
Voltage Reference (C8051F300/2)
The voltage reference MUX on C8051F300/2 devices is configurable to use an externally connected volt-
age reference or the power supply voltage, VDD (see Figure 6.1). The REFSL bit in the Reference Control
register (REF0CN) selects the reference source. For an external source, REFSL should be set to ‘0’; For
VDD as the reference source, REFSL should be set to ‘1’.
The BIASE bit enables the internal voltage bias generator, which is used by the ADC, Temperature Sensor,
and Internal Oscillator. This bit is forced to logic 1 when any of the aforementioned peripherals is enabled.
The bias generator may be enabled manually by writing a ‘1’ to the BIASE bit in register REF0CN; see
SFR Definition 6.1 for REF0CN register details. The electrical specifications for the voltage reference cir-
cuit are given in Table 6.1.
Important Note About the VREF Input: Port pin P0.0 is used as the external VREF input. When using an
external voltage reference, P0.0 should be configured as analog input and skipped by the Digital Crossbar.
To configure P0.0 as analog input, set to ‘1’ Bit0 in register P0MDIN. To configure the Crossbar to skip
P0.0, set to ‘1’ Bit0 in register XBR0. Refer to Section “12. Port Input/Output” on page 103 for complete
Port I/O configuration details. The external reference voltage must be within the range 0
VREF V
DD.
On C8051F300/2 devices, the temperature sensor connects to the highest order input of the ADC0 positive
input multiplexer (see Section “5.1. Analog Multiplexer and PGA” on page 36 for details). The TEMPE
bit in register REF0CN enables/disables the temperature sensor. While disabled, the temperature sensor
defaults to a high impedance state and any ADC0 measurements performed on the sensor result in mean-
ingless data.
Internal
VREF
(to ADC)
To Analog Mux
VDD
VREF
R1
VDD
External
Voltage
Reference
Circuit
GND
REF0CN
RE
FS
L
TE
MP
E
BIA
SE
Temp Sensor
EN
Bias Generator
To ADC, Internal
Oscillator,
Temperature Sensor
EN
IOSCEN
0
1
Figure 6.1. Voltage Reference Functional Block Diagram
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