參數(shù)資料
型號: DSPB56362AG120
廠商: Freescale Semiconductor
文件頁數(shù): 69/152頁
文件大?。?/td> 0K
描述: IC DSP 24BIT AUD 120MHZ 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機接口,I²C,SAI,SPI
時鐘速率: 120MHz
非易失內(nèi)存: ROM(126 kB)
芯片上RAM: 42kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤
Enhanced Serial Audio Interface
DSP56362 Technical Data, Rev. 4
Freescale Semiconductor
2-17
FST
PC4
Input or Output
Input, Output, or
Disconnected
GPIO Disconnected Frame Sync for Transmitter—This is the transmitter frame sync
input/output signal. For synchronous mode, this signal is the frame
sync for both transmitters and receivers. For asynchronous mode, FST
is the frame sync for the transmitters only. The direction is determined
by the transmitter frame sync direction (TFSD) bit in the ESAI transmit
clock control register (TCCR).
Port C 4—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
SCKR
PC0
Input or Output
Input, Output, or
Disconnected
GPIO Disconnected Receiver Serial Clock—SCKR provides the receiver serial bit clock
for the ESAI. The SCKR operates as a clock input or output used by
all the enabled receivers in the asynchronous mode (SYN=0), or as
serial flag 0 pin in the synchronous mode (SYN=1).
When this pin is configured as serial flag pin, its direction is
determined by the RCKD bit in the RCCR register. When configured
as the output flag OF0, this pin will reflect the value of the OF0 bit in
the SAICR register, and the data in the OF0 bit will show up at the pin
synchronized to the frame sync in normal mode or the slot in network
mode. When configured as the input flag IF0, the data value at the pin
will be stored in the IF0 bit in the SAISR register, synchronized by the
frame sync in normal mode or the slot in network mode.
Port C 0—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
SCKT
PC3
Input or Output
Input, Output, or
Disconnected
GPIO Disconnected Transmitter Serial Clock—This signal provides the serial bit rate
clock for the ESAI. SCKT is a clock input or output used by all enabled
transmitters and receivers in synchronous mode, or by all enabled
transmitters in asynchronous mode.
Port C 3—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
SDO5
SDI0
PC6
Output
Input
Input, Output, or
Disconnected
GPIO Disconnected Serial Data Output 5—When programmed as a transmitter, SDO5 is
used to transmit data from the TX5 serial transmit shift register.
Serial Data Input 0—When programmed as a receiver, SDI0 is used
to receive serial data into the RX0 serial receive shift register.
Port C 6—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input is 5 V tolerant.
Table 2-11 Enhanced Serial Audio Interface Signals (continued)
Signal
Name
Signal Type
State during Reset
Signal Description
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