Operating Conditions: " />
參數(shù)資料
型號: DSP56F801FA80E
廠商: Freescale Semiconductor
文件頁數(shù): 21/48頁
文件大小: 0K
描述: IC DSP 60MHZ 16KB FLASH 48-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 80MHz
連通性: SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 11
程序存儲器容量: 20KB(10K x 16)
程序存儲器類型: 閃存
RAM 容量: 2K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
56F801 Technical Data, Rev. 17
28
Freescale Semiconductor
3.5.5
Phase Locked Loop Timing
Table 3-10 PLL Timing
Operating Conditions: V
SS = VSSA = 0 V, VDD = VDDA = 3.0–3.6 V, TA = –40° to +85°C
Characteristic
Symbol
Min
Typ
Max
Unit
External reference crystal frequency for the PLL1
1.
An externally supplied reference clock should be as free as possible from any phase jitter for the PLL to work
correctly. The PLL is optimized for 8MHz input crystal.
2.
ZCLK may not exceed 80MHz. For additional information on ZCLK and fout/2, please refer to the OCCS chapter in the
User Manual. ZCLK = fop
3.
Will not exceed 60MHz for the DSP56F801FA60 device.
4.
This is the minimum time required after the PLL setup is changed to ensure reliable operation.
fosc
48
10
MHz
PLL output frequency2
fout/2
40
803
MHz
PLL stabilization time4 0o to +85oC
tplls
—10—
ms
PLL stabilization time4 -40o to 0oC
tplls
100
200
ms
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DSP56F802TA60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60Mhz/30MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT