參數(shù)資料
型號: DS26502LN+
廠商: Maxim Integrated Products
文件頁數(shù): 4/125頁
文件大?。?/td> 0K
描述: IC T1/E1/J1 64KCC ELEMENT 64LQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 160
類型: BITS 元件,多路復(fù)用器
PLL:
主要目的: T1/E1
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 2:3
差分 - 輸入:輸出: 無/無
頻率 - 最大: 6.312MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁面: 1430 (CN2011-ZH PDF)
DS26502 T1/E1/J1/64KCC BITS Element
101 of 125
Select-IR-Scan
All test registers retain their previous state. The instruction register will remain unchanged during this
state. With JTMS LOW, a rising edge on JTCLK moves the controller into the capture-IR state and will
initiate a scan sequence for the instruction register. JTMS HIGH during a rising edge on JTCLK puts the
controller back into the test-logic-reset state.
Capture-IR
The capture-IR state is used to load the shift register in the instruction register with a fixed value. This
value is loaded on the rising edge of JTCLK. If JTMS is HIGH on the rising edge of JTCLK, the
controller will enter the exit1-IR state. If JTMS is LOW on the rising edge of JTCLK, the controller will
enter the shift-IR state.
Shift-IR
In this state, the shift register in the instruction register is connected between JTDI and JTDO and shifts
data one stage for every rising edge of JTCLK toward the serial output. The parallel register as well as all
test registers remain at their previous states. A rising edge on JTCLK with JTMS HIGH will move the
controller to the exit1-IR state. A rising edge on JTCLK with JTMS LOW will keep the controller in the
shift-IR state while moving data one stage thorough the instruction shift register.
Exit1-IR
A rising edge on JTCLK with JTMS LOW will put the controller in the pause-IR state. If JTMS is HIGH
on the rising edge of JTCLK, the controller will enter the update-IR state and terminate the scanning
process.
Pause-IR
Shifting of the instruction shift register is halted temporarily. With JTMS HIGH, a rising edge on JTCLK
will put the controller in the exit2-IR state. The controller will remain in the pause-IR state if JTMS is
LOW during a rising edge on JTCLK.
Exit2-IR
A rising edge on JTCLK with JTMS LOW will put the controller in the update-IR state. The controller
will loop back to shift-IR if JTMS is HIGH during a rising edge of JTCLK in this state.
Update-IR
The instruction code shifted into the instruction shift register is latched into the parallel output on the
falling edge of JTCLK as the controller enters this state. Once latched, this instruction becomes the
current instruction. A rising edge on JTCLK with JTMS LOW, will put the controller in the run-test-idle
state. With JTMS HIGH, the controller will enter the select-DR-scan state.
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DS26502LN+ 功能描述:計時器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26503 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:T1/E1/J1/64KCC BITS Element
DS26503_07 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:T1/E1/J1 BITS Element
DS26503DK 功能描述:時鐘和定時器開發(fā)工具 DS26503 Dev Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
DS26503L 功能描述:計時器和支持產(chǎn)品 E1-T1-J1 Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel