4.1 Transmit PLL NAME TYPE FUNCTION PLL_OUT O Transmit PLL Output. Th" />
參數(shù)資料
型號： DS26502LN+
廠商： Maxim Integrated Products
文件頁數(shù)： 32/125頁
文件大?。?/td> 0K
描述： IC T1/E1/J1 64KCC ELEMENT 64LQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 160
類型： BITS 元件，多路復(fù)用器
PLL： 是
主要目的： T1/E1
輸入： 時(shí)鐘
輸出： 時(shí)鐘
電路數(shù)： 1
比率 - 輸入:輸出： 2:3
差分 - 輸入:輸出： 無/無
頻率 - 最大： 6.312MHz
電源電壓： 3.135 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
產(chǎn)品目錄頁面： 1430 (CN2011-ZH PDF)
DS26502 T1/E1/J1/64KCC BITS Element
14 of 125
4. PIN FUNCTION DESCRIPTION
4.1 Transmit PLL
NAME
TYPE
FUNCTION
PLL_OUT
O
Transmit PLL Output. This pin can be selected to output the 1544kHz,
2048kHz, 64kHz, or 6312kHz output from the internal TX PLL or the internal
signal, TX CLOCK. See Figure 3-3 and Figure 3-4.
TCLK
I
Transmit Clock Input. A 64kHz, 1.544MHz, 2.048MHz, or 6312kHz
primary clock. May be selected by the TX PLL mux to either directly drive
the transmit section or be converted to one of the other rates prior to driving
the transmit section. See Figure 3-3 and Figure 3-4.
4.2 Transmit Side
NAME
TYPE
FUNCTION
TSER
I
Transmit Serial Data. Source of transmit data sampled on the falling edge of
TX CLOCK (an internal signal). See Figure 3-1, Figure 3-3, and the transmit
timing diagram (Figure 20-11).
TS_8K_4
I/O
TSYNC, 8kHz Sync, 400Hz Sync
T1/E1 Mode: In input mode, this pin is sampled on the falling edge of TX
CLOCK (an internal signal) and a pulse at this pin will establish either frame
or multiframe boundaries for the transmit side. See Figure 3-1 and the transmit
timing diagram (Figure 20-11).
In output mode, this pin is updated on the rising edge of TX CLOCK (an
internal signal) and can be programmed to output a frame or multiframe sync
pulse useful for aligning data. See Figure 3-1 and the transmit timing diagram
64KCC Mode: In input mode, this pin is sampled on the falling edge of TX
CLOCK (an internal signal) and will establish the boundary for the 8kHz
portion of the Composite Clock or the 400Hz boundary based on the setting of
IOCR1.3. See Figure 3-1 and the transmit timing diagram (Figure 20-11).
In output mode, this pin is updated on the rising edge of TX CLOCK (an
internal signal) and will indicate the 8kHz or 400Hz composite clock
alignment. See Figure 3-1 and the transmit timing diagram (Figure 20-11).
TCLKO
O
Transmit Clock Output. In normal operation this output is the selected
transmit clock from the TX_PLL, TCLK pin or the recovered clock (RCLK).
When remote loopback is enabled this pin will output the recovered network
clock.
TPOSO
O
Transmit Positive-Data Output. In T1 or E1 mode, updated on the rising
edge of TCLKO with the bipolar data out of the transmit-side formatter. Can
be programmed to source NRZ data via the output-data format (IOCR1.0)
control bit. In 64KCC or 6312kHz mode this pin will be low.
TNEGO
O
Transmit Negative-Data Output. In T1 or E1 mode, updated on the rising
edge of TCLKO with the bipolar data out of the transmit-side formatter. In
64KCC or 6312kHz mode this pin will be low.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26502LN+ 功能描述:計(jì)時(shí)器和支持產(chǎn)品 E1/T1/J1/64Kcc Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
DS26503 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:T1/E1/J1/64KCC BITS Element
DS26503_07 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:T1/E1/J1 BITS Element
DS26503DK 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 DS26503 Dev Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
DS26503L 功能描述:計(jì)時(shí)器和支持產(chǎn)品 E1-T1-J1 Bits Element RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
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