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參數(shù)資料
| 型號(hào)： | DS21552LN |
| 英文描述： | 3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers |
| 中文描述： | 3.3 DS21352及5V DS21552 T1單芯片收發(fā)器 |
| 文件頁數(shù)： | 60/137頁 |
| 文件大?。?/td> | 1094K |
| 代理商： | DS21552LN |
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DS21352/DS21552
60 of 137
11.1 TRANSMIT SIDE CODE GENERATION
In the transmit direction there are two methods by which channel data from the backplane can be
overwritten with data generated by the framer. The first method which is covered in Section 11.1 was a
feature contained in the original DS2151 while the second method which is covered in Section 11.2 is a
new feature of the DS2152/352/552.
11.1.1 FIXED PER-CHANNEL IDLE CODE INSERTION
The first method involves using the Transmit Idle Registers (TIR1/2/3) to determine which of the 24 T1
channels should be overwritten with the code placed in the Transmit Idle Definition Register (TIDR).
This method allows the same 8–bit code to be placed into any of the 24 T1 channels. If this method is
used, then the CCR4.0 control bit must be set to zero.
Each of the bit position in the Transmit Idle Registers (TIR1/TIR2/TIR3) represent a DS0 channel in the
outgoing frame. When these bits are set to a one, the corresponding channel will transmit the Idle Code
contained in the Transmit Idle Definition Register (TIDR). Robbed bit signaling and Bit 7 stuffing will
occur over the programmed Idle Code unless the DS0 channel is made transparent by the Transmit
Transparency Registers.
TIR1/TIR2/TIR3: TRANSMIT IDLE REGISTERS
(Address=3C to 3E Hex
)
[Also used for Per–Channel Loopback]
(MSB)
CH8
CH16
CH24
(LSB)
CH1
CH9
CH17
CH7
CH15
CH23
CH6
CH14
CH22
CH5
CH13
CH21
CH4
CH12
CH20
CH3
CH11
CH19
CH2
CH10
CH18
TIR1 (3C)
TIR2 (3D)
TIR3 (3E)
SYMBOLS
POSITIONS
NAME AND DESCRIPTION
CH1-24
TIR1.0-3.7
Transmit Idle Code Insertion Control Bits.
0 = do not insert the Idle Code in the TIDR into this channel
1 = insert the Idle Code in the TIDR into this channel
NOTE:
If CCR4.0=1, then a zero in the TIRs implies that channel data is to be sourced from TSER and a one
implies that channel data is to be sourced from the output of the receive side framer (i.e., Per–Channel
Loopback; see Figure 3-1.
TIDR: TRANSMIT IDLE DEFINITION REGISTER (Address=3F Hex)
(MSB)
TIDR7
(LSB)
TIDR0
TIDR6
TIDR5
TIDR4
TIDR3
TIDR2
TIDR1
SYMBOL
POSITION
NAME AND DESCRIPTION
TIDR7
TIDR.7
MSB of the Idle Code (this bit is transmitted first)
TIDR0
TIDR.0
LSB of the Idle Code (this bit is transmitted last)
11.1.2 UNIQUE PER-CHANNEL IDLE CODE INSERTION
The second method involves using the Transmit Channel Control Registers (TCC1/2/3) to determine which of the 24 T1
channels should be overwritten with the code placed in the Transmit Channel Registers (TC1 to TC24). This method is more
flexible than the first in that it allows a different 8–bit code to be placed into each of the 24 T1 channels.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS21354 | MTTF is frequently used interchangeably with MTBF |
| DS21354L | 3.3V/5V E1 Single-Chip Transceivers |
| DS21354LN | 3.3V/5V E1 Single-Chip Transceivers |
| DS21354 | 3.3V/5V E1 Single-Chip Transceivers |
| DS2152LN | Enhanced T1 Single-Chip Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21552LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21554 | 制造商:Maxim Integrated Products 功能描述: |
| DS21554G | 功能描述:IC TXRX E1 1-CHIP 5V 100-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS21554GN | 功能描述:IC TXRX E1 1-CHIP 5V 100-BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS21554L | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 3.3/5V E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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