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參數(shù)資料
| 型號(hào)： | DRV591GQE |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁(yè)數(shù)： | 14/19頁(yè) |
| 文件大?。?/td> | 256K |
| 代理商： | DRV591GQE |
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DRV591
SLOS389
–
NOVEMBER 2001
14
www.ti.com
APPLICATION INFORMATION
input configuration: differential and single-ended
If a differential input is used, it should be biased around the midrail of the DRV591 and must not exceed the
common-mode input range of the input stage (see the operating characteristics at the beginning of the data
sheet).
The most common configuration employs a single-ended input. The unused input should be tied to V
DD
/2, which
may be simply accomplished with a resistive voltage divider. For the best performance, the resistor values
chosen should be at least 100 times lower than the input resistance of the DRV591. This prevents the bias
voltage at the unused input from shifting when the signal input is applied. A small ceramic capacitor should also
be placed from the input to ground to filter noise and keep the voltage stable. An op amp configured as a buffer
may also be used to set the voltage at the unused input.
fixed internal gain
The differential output voltage may be calculated using equation (7):
VO
VOUT
–
VOUT
–
AvVIN
–
VIN
–
A
V
is the voltage gain, which is fixed internally at 2.34 V/V. The maximum and minimum ratings are provided
in the electrical specification table at the beginning of the data sheet.
power supply decoupling
To reduce the effects of high-frequency transients or spikes, a small ceramic capacitor, typically 0.1
μ
F to 1
μ
F,
should be placed as close to each set of PVDD pins of the DRV591 as possible. For bulk decoupling, a 10
μ
F
to 100
μ
F tantalum or aluminum electrolytic capacitor should be placed relatively close to the DRV591.
AREF capacitor
The AREF terminal is the output of an internal mid-rail voltage regulator used for the onboard oscillator and ramp
generator. The regulator may not be used to provide power to any additional circuitry. A 1
μ
F ceramic capacitor
must be connected from AREF to AGND for stability (see oscillator components above for AGND connection
information).
SHUTDOWN operation
The DRV591 includes a shutdown mode that disables the outputs and places the device in a low supply current
state. The SHUTDOWN pin may be controlled with a TTL logic signal. When SHUTDOWN is held high, the
device operates normally. When SHUTDOWN is held low, the device is placed in shutdown. The SHUTDOWN
pin must not be left floating. If the shutdown feature is unused, the pin may be connected to VDD.
(7)
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| DRV591VFP | 功能描述:功率驅(qū)動(dòng)器IC High Efficiency PWM Power Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
| DRV591VFP(1) | 制造商:TI 制造商全稱:Texas Instruments 功能描述:3-A HIGH-EFFICIENCY PWM POWER DRIVER |
| DRV591VFP | 制造商:Texas Instruments 功能描述:PWM POWER DRIVER SMD HLQFP32 591 |
| DRV591VFP1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:3-A HIGH-EFFICIENCY PWM POWER DRIVER |
| DRV591VFPG4 | 功能描述:功率驅(qū)動(dòng)器IC High Efficiency PWM Power Driver RoHS:否 制造商:Micrel 產(chǎn)品:MOSFET Gate Drivers 類型:Low Cost High or Low Side MOSFET Driver 上升時(shí)間: 下降時(shí)間: 電源電壓-最大:30 V 電源電壓-最小:2.75 V 電源電流: 最大功率耗散: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube |
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