參數(shù)資料
型號(hào)： DNC3X3125
廠(chǎng)商： Lineage Power
英文描述： 10/100 Mbits/s Ethernet Transceiver Macrocell(10M位/秒和100 M位/秒以太網(wǎng)收發(fā)器宏單元)
中文描述： 10/100 Mbits /秒以太網(wǎng)收發(fā)器宏單元（1000萬(wàn)位/秒和100海里位/秒以太網(wǎng)收發(fā)器宏單元）
文件頁(yè)數(shù)： 25/32頁(yè)
文件大?。?/td> 460K
代理商： DNC3X3125
Advance Data Sheet
March 2000
DNC3X3125
10/100 Mbits/s Ethernet Transceiver Macrocell
25
4
Register Information
(continued)
Table 20. MR7—Next Page Transmit Register Bit Descriptions
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
R = read, W = write.
Table 21. MR16—PCS Control Register Bit Descriptions
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
R = read, W = write.
Bit
*
Type
R/W
Description
7.15 (NEXT_PAGE)
Next Page.
This bit indicates whether or not this is the last next page to be transmit-
ted. When this bit is 0, it indicates that this is the last page. When this bit is 1, it
indicates there is an additional next page.
Acknowledge.
This bit is the acknowledge bit from the link code word.
Message Page.
This bit is used to differentiate a message page from an unformat-
ted page. When this bit is 0, it indicates an unformatted page. When this bit is 1, it
indicates a formatted page.
Acknowledge 2.
This bit is used by the next page function to indicate that a device
has the ability to comply with the message. It is set as follows:
7.14 (ACK)
7.13 (MESSAGE)
R
R/W
7.12 (ACK2)
R/W
I
When this bit is 0, it indicates the device cannot comply with the message.
I
When this bit is 1, it indicates the device will comply with the message.
Toggle.
This bit is used by the arbitration function to ensure synchronization with
the link partner during next page exchange.This bit will always take the opposite
value of the toggle bit in the previously exchanged link code word:
I
If the bit is a logic 0, the previous value of the transmitted link code word was a
logic 1.
7.11 (TOGGLE)
R
I
If the bit is a 1, the previous value of the transmitted link code word was a 0.
The initial value of the toggle bit in the first next page transmitted is the inverse of
the value of bit 11 in the base link code word, and may assume a value of 1 or 0.
Message/Unformatted Code Field.
With these 11 bits, there are 2048 possible
messages. Message code field definitions are described in annex 28C of the IEEE
802.3u standard.
7.10:0 (MCF)
R/W
Bit
*
Type
R
R
R/W
R/W
R/W
Description
16.15 (LOCKED)
16.14-12 (Reserved)
16.11 (ANA_RG21)
16.10 (LPWR_TUN)
16.9 (SMFIX_DA)
16.8 (EN_NOWR)
16.7-6 (ATST1:0)
16.5 (BYPPD125)
16.4 (BYPPD160)
16.3 (LOOPBACK)
Locked.
Locked pin from descrambler block.
Reserved.
Should be written as 0.
Analog Regiser 21.
Lucent Debug Register - Should be wrtten as 0.
Low Power Tuner.
Lucent Debug Register - Should be wrtten as 0.
State Machine Fix.
Lucent Debug Register - Should be written as 0.
Enable Nowire.
This bit is OR’d with EN_NOWR input
Autonegotiation Testmode (1:0).
Lucent Debug Register - Should be written 0
Bypass Powerdown 125.
OR’d with BYPPD125 Input
Bypass Powerdown 160.
OR’d with BYPPD160 Input
Loopback Configure.
When this bit is high, the entire loopback is performed in the
PCS macro. When this bit is low, only the collision pin is disabled in loopback.
Scan Test Mode
. Lucent Debug Register - should be written as 0.
Force Loopback.
Force a loopback without forcing idle on the transmit side or dis-
abling the collision pin.
Speedup Counters.
Reduce link monitor counter to 10
μ
s from 620
μ
s. (Same as
FASTTEST = 1.)
R/W
16.2 (SCAN)
16.1 (FORCE
LOOPBACK)
16.0 (SPEEDUP
COUNTERS)
R/W
R/W
R/W
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