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參數(shù)資料
| 型號： | DNC3X3125 |
| 廠商： | Lineage Power |
| 英文描述： | 10/100 Mbits/s Ethernet Transceiver Macrocell(10M位/秒和100 M位/秒以太網(wǎng)收發(fā)器宏單元) |
| 中文描述： | 10/100 Mbits /秒以太網(wǎng)收發(fā)器宏單元（1000萬位/秒和100海里位/秒以太網(wǎng)收發(fā)器宏單元） |
| 文件頁數(shù)： | 24/32頁 |
| 文件大?。?/td> | 460K |
| 代理商： | DNC3X3125 |
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DNC3X3125
10/100 Mbits/s Ethernet Transceiver Macrocell
Advance Data Sheet
March 2000
4
Register Information
(continued)
Table 19. MR6—Autonegotiation Expansion Register Bit Descriptions
* The format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the register.
R = read, LH = latched high.
Bit
*
Type
R
R/LH
Parallel Detection Fault.
When this bit is set to 1, it indicates that a fault
has been detected in the parallel detection function. This fault is due to
more than one technology detecting concurrent link conditions. This bit
can only be cleared by reading this register.
R
Link Partner Next Page Able.
When this bit is set to 1, it indicates that
the link partner supports the next page function.
R
Next Page Able.
This bit is set to 1, indicating that this device supports
the NEXT_PAGE function.
R/LH
Page Received
. When this bit is set to 1, it indicates that a NEXT_PAGE
has been received.
R
Link Partner Autonegotiation Capable.
When this bit is set to 1, it indi-
cates that the link partner is autonegotiation capable.
Description
6.15:5 (RESERVED)
6.4 (PAR_DET_FAULT)
Reserved
.
6.3 (LP_NEXT_PAGE_ABLE)
6.2 (NEXT_PAGE_ABLE)
6.1 (PAGE_REC)
6.0 (LP_NWAY_ABLE)
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