參數(shù)資料
型號(hào): DMC73C167
英文描述: 8Bit Single Chip Microcontroller
中文描述: 8位單芯片微控制器
文件頁(yè)數(shù): 24/90頁(yè)
文件大?。?/td> 742K
代理商: DMC73C167
24
8Bit Single Chip Microcontroller
DMC73C167
5. FUNCTION
5.1 Input/Output Ports
The DMC73C167 has 28 I/O pins organized as four parallel ports labeled
A, B, C and D. Each port is mapped into 4- to 8-bit data value resiters in the peripheral file (PF).
The data value registers are usually called APORT, BPORT, CPORT and DPORT in a program.
Ports A, C and D are implemented as bidirectional I/O ports.
Port B is an open-drain output only port with a 12 V buffer (B0-B3)and 12mA current drive
capability (B4-B7).
Each bidirectional port (that is, Port A, C and D) has a corresponding data direction register
(DDR) that programs each I/O pin as an input or output pin. A bit set to 1 in the DDR will
cause the corresponding pin to be an output pin, while a 0 in the DDR will turn the pin into
a high-impedance input pin. Upon RESET, the DDR filp-flop registers are set to 0 by the
on-chip circuitry, forcing them to become inputs. Also upon RESET, the output data registers
of the output only port (that is, Port B) are set to 1 by the on-chip circuitry. And, other output
data registers are indeterminated data set.
After RESET, if 1s are writtern to the DDR register sometime before the output data register
is changed, then the corresponding I/O pins will output a 1. For this reason, it is good
practice to load the output data registers of Ports A, C and D with the desired value before
any bits are configured as outputs. In addition, DMC73C167 has several mask options
related to the I/O pins such as pull-up resistors. Those I/O pins are individually configurable
at the masking stage. For a detailed description of the I/O pins in the DMC73C167,
see table 3-2.
5.1.1 A Port
Pins A0 to A7 of A port are bidirectional I/O ports and several hardware-related functions are
interfaced with the CPU through this port. Pin A0 can be used as an analog input for the on-
chip A/D converter. Pin A1 and A2 can be used for the event counter input of Timer 1 and
Timer 2, respectively. Pin A3, A4 and A5 can be used for the Schmitt-buffered external interrupt
input for INT1, INT3_0, and INT5_0, respectively.
Reading the port - A data register (P6) returns each value at the A0 - A7 pins if the
corresponding DDR bit is set to 0 and returns each output buffer register value if the DDR
bit is 1. The user can specify internal pull-up (5V) resistor insertion or not selectively for port
A pins (mask option).
Table 5-1. P7 0107h ADDR A Port Direction
Bit
R
W
7
6
5
4
3
2
1
0
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
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