參數(shù)資料
型號: DD28F032SA-150
廠商: INTEL CORP
元件分類: DRAM
英文描述: 32-MBIT (2 MBIT X 16, 4 MBIT X 8) FlashFile⑩ MEMORY
中文描述: 4M X 8 FLASH 12V PROM, 150 ns, PDSO56
封裝: 14 X 20 MM, 1.20 MM HEIGHT, TSOP-56
文件頁數(shù): 27/49頁
文件大?。?/td> 1402K
代理商: DD28F032SA-150
E
6.5 DC Characteristics
(Continued)
V
= 5.0V ± 0.5V, 5.0V ± 0.25V, T
A
= 0°C to +70°C
3/5# Pin Set Low for 5.0V Operations
DD28F032SA
27
Symbol
Parameter
Notes
Min
Typ
Max
Units
Test Conditions
I
CCE
V
CC
Block Erase
Current
V
CC
Erase Suspend
Current
1,7
18
25
mA
Block Erase in Progress
I
CCES
1,2,6,7
5
10
mA
CE
0
#, CE
X
# = V
IH
Block Erase Suspended
I
PPS
V
PP
Standby/
Read Current
1
± 2
± 20
μA
V
PP
V
CC
I
PPR
130
400
μA
V
PP
> V
CC
I
PPD
V
PP
Deep Power-
Down Current
1
0.4
10
μA
RP# = GND ± 0.2V
I
PPW
V
PP
Prog. Current
for Word or Byte
1
7
12
mA
V
PP
= V
PPH
Program in Progress
I
PPE
V
PP
Block Erase
Current
V
PP
Erase
Suspend Current
1
5
10
mA
V
PP
= V
PPH
Block Erase in Progress
V
PP
= V
PPH
Block Erase Suspended
I
PPES
1
130
400
μA
V
IL
Input Low Voltage
–0.5
0.8
V
V
IH
Input High Voltage
2.0
V
CC
+ 0.5
V
V
OL
Output Low Voltage
0.45
V
V
CC
= V
CC
Min, I
OL
= 5.8 mA
V
OH
1
Output High
Voltage
0.85
V
CC
V
CC
– 0.4
V
V
CC
= V
CC
Min, I
OH
= –2.5 mA
V
OH
2
V
CC
= V
CC
Min, I
OH
= –100 μA
V
PPL
V
PP
during Normal
Operations
V
PP
during Prog.
Erase Operations
V
CC
Program/Erase
Lock Voltage
3
0.0
6.5
V
V
PPH
11.4
12.0
12.6
V
V
LKO
2.0
V
NOTES:
1.
All currents are in RMS unless otherwise noted. Typical values at V
CC
= 5.0V, V
PP
= 12.0V, T = +25°C. These currents are
valid for all product versions (package and speeds).
I
is specified with the device de-selected. If the device is read while in erase suspend mode, current draw is the sum
of I
CCES
and I
CCR.
Block erases, word/byte programs and lock block operations are inhibited when V
PP
= V
PPL
and not guaranteed in the
range between V
PPH
and V
PPL
.
Automatic Power Saving (APS) reduces I
CCR
to <2 mA in static operation.
CMOS Inputs are either V
CC
± 0.2V or GND ± 0.2V. TTL Inputs are either V
IL
or V
IH
.
CE
X
#= CE
1
# or CE
2
#.
If operating with TTL levels, add 4 mA of V
CC
standby current. to max I
CCR
1, I
CCR
2, I
CCW
, I
CCE
and I
CCES
.
Standby current levels are not reached when putting the chip in standby mode immediately after reading the page buffer.
Default the device into read array or read Status Register mode before entering standby to ensure standby current levels.
2.
3.
4.
5.
6.
7.
8.
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