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參數(shù)資料
| 型號： | DC1010A-C |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 21/32頁 |
| 文件大小： | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2487 |
| 軟件下載： | QuikEval System |
| 設(shè)計(jì)資源： | DC1010A Design File DC1010A Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 15 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 已用 IC / 零件： | LTC2487 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | LTC2487IDE#TRPBF-ND - IC ADC 16BIT DELTA SIG 14-DFN LTC2487CDE#TRPBF-ND - IC ADC 16BIT DELTA SIG 14-DFN LTC2487CDE#PBF-ND - IC ADC 16BIT DELTA SIG 14-DFN LTC2487IDE#PBF-ND - IC ADC 16BIT DELTA SIG 14-DFN |
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LTC2487
28
2487fd
characteristics around DC and multiples of fS. The device
bypasses the offset calibration in order to increase the out-
put rate. The resulting rejection plots are shown in Figures
26 and 27. 1x type frequency rejection can be achieved
using the 2x mode by performing a running average of the
previous two conversion results (see Figure 28).
Output Data Rate
When using its internal oscillator, the LTC2487 produces
up to 15 samples per second (sps) with a notch frequency of
60Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignicantly short. When
operating with an external conversion clock (fO connected
to an external oscillator), the LTC2487 output data rate
can be increased. The duration of the conversion cycle is
41036/fEOSC. If fEOSC = 307.2kHz, the converter behaves
as if the internal oscillator is used.
An increase in fEOSC over the nominal 307.2kHz will trans-
late into a proportional increase in the maximum output
data rate (up to a maximum of 100sps). The increase in
output rate leads to degradation in offset, full-scale error
and effective resolution as well as a shift in frequency
rejection. When using the integrated temperature sensor,
the internal oscillator should be used or an external oscil-
lator fEOSC = 307.2kHz maximum.
A change in fEOSC results in a proportional change in the
internal notch position. This leads to reduced differential
mode rejection of line frequencies. The common mode
rejection of line frequencies remains unchanged, thus fully
differential input signals with a high degree of symmetry
on both the IN+ and IN– pins will continue to reject line
frequency noise.
An increase in fEOSC also increases the effective dynamic
input and reference current. External RC networks will
continue to have zero differential input current, but the
time required for complete settling (580ns for fEOSC =
307.2kHz) is reduced, proportionally.
Once the external oscillator frequency is increased above
1MHz (a more than 3x increase in output rate) the effective-
ness of internal auto calibration circuits begins to degrade.
This results in larger offset errors, full-scale errors, and
decreased resolution, as seen in Figures 29 to 36.
Figure 26. Input Normal Mode Rejection 2x Speed Mode
Figure 27. Input Normal Mode Rejection 2x Speed Mode
APPLICATIONS INFORMATION
INPUT SIGNAL FREQUENCY (fN)
INPUT
NORMAL
REJECTION
(dB)
2487 F26
0
–20
–40
–60
–80
–100
–120
0
fN
2fN 3fN 4fN 5fN 6fN 7fN 8fN
INPUT SIGNAL FREQUENCY (fN)
INPUT
NORMAL
REJECTION
(dB)
2487 F27
0
–20
–40
–60
–80
–100
–120
250
248
252 254 256 258 260 262 264
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| DC1011A-A | 功能描述:BOARD DELTA SIGMA ADC LTC2498 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:Easy Drive™, QuikEval™ 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| DC1011A-B | 功能描述:BOARD DELTA SIGMA ADC LTC2496 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:Easy Drive™, QuikEval™ 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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