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參數(shù)資料

型號：	DAC1408D650HN
廠商：	NXP Semiconductors N.V.
元件分類：	外設(shè)及接口
英文描述：	Dual 14-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
封裝：	DAC1408D650HN/C1<SOT804-3\|<<<1<Always Pb-free,;DAC1408D650HN/C1<SOT804-3\|<<<1<Always Pb-free,;
文件頁數(shù)：	94/98頁
文件大?。?/td>	2600K
代理商：	DAC1408D650HN

DAC1408D650

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 26 November 2010

94 of 98

continued >>

NXP Semiconductors

DAC1408D650

, 4

or 8

interpolating DAC with JESD204A

16. Tables

Table 1. Ordering information . . . . . . . . . . . . . . . . . . . . .2

Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . .4

Table 3. Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . .6

Table 4. Thermal characteristics . . . . . . . . . . . . . . . . . . .6

Table 5. Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .7

Table 6. Digital Layer Processing Latency . . . . . . . . . . .12

Table 7. Read or Write mode access description . . . . .23

Table 8. Number of bytes to be transferred . . . . . . . . . .23

Table 9. SPI timing characteristics . . . . . . . . . . . . . . . .24

Table 10. Interpolation filter coefficients . . . . . . . . . . . . .26

Table 11. Inversion filter coefficients . . . . . . . . . . . . . . . .28

Table 12. DAC transfer function . . . . . . . . . . . . . . . . . . .28

Table 13. I

O(fs)

coarse adjustment . . . . . . . . . . . . . . . . . .30

Table 14. I

O(fs)

fine adjustment . . . . . . . . . . . . . . . . . . . .30

Table 15. Digital offset adjustment . . . . . . . . . . . . . . . . .31

Table 16. Auxiliary DAC transfer function . . . . . . . . . . . .32

Table 17. Page 0 register allocation map . . . . . . . . . . . .38

Table 18. COMMON register (address 00h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .40

Table 19. TXCFG register (address 01h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .40

Table 20. PLLCFG register (address 02h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .41

Table 21. FREQNCO_LSB register (address 03h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .41

Table 22. FREQNCO_LISB register (address 04h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .41

Table 23. FREQNCO_UISB register (address 05h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .41

Table 24. FREQNCO_MSB register (address 06h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .42

Table 25. PHINCO_LSB register (address 07h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .42

Table 26. PHINCO_MSB register (address 08h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .42

Table 27. DAC_A_CFG_1 register (address 09h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .42

Table 28. DAC_A_CFG_2 register (address 0Ah)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .42

Table 29. DAC_A_CFG_3 register (address 0Bh)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .42

Table 30. DAC_B_CFG_1 register (address 0Ch)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .43

Table 31. DAC_B_CFG_2 register (address 0Dh)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .43

Table 32. DAC_B_CFG_3 register (address 0Eh)

bit description . . . . . . . . . . . . . . . . . . . . . . . . .43

Table 33. DAC_CFG register (address 0Fh)

bit description . . . . . . . . . . . . . . . . . . . . . . . . . 43

Table 34. DAC_CURRENT_0 register (address 11h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . . 43

Table 35. DAC_CURRENT_1 register (address 12h)

bit description . . . . . . . . . . . . . . . . . . . . . . . . . 43

Table 36. DAC_CURRENT_2 register (address 13h)