參數(shù)資料
型號(hào): DAC1408D650HN
廠(chǎng)商: NXP Semiconductors N.V.
元件分類(lèi): 外設(shè)及接口
英文描述: Dual 14-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
封裝: DAC1408D650HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1408D650HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁(yè)數(shù): 48/98頁(yè)
文件大?。?/td> 2600K
代理商: DAC1408D650HN
DAC1408D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 26 November 2010
48 of 98
NXP Semiconductors
DAC1408D650
2
, 4
or 8
interpolating DAC with JESD204A
Table 51.
Default settings are shown highlighted.
Bit
Symbol
4
MDS_EVAL_ENA
MDS_MISCCNTRL0 register (address 03h) bit description
Access
R/W
Value
Description
MDS evaluation
disabled
enabled
automatic MDS start-up
no mds_win/mds_ref generation in advance
mds_win/mds_ref run-in before MDS evaluation
width of MDS (in output clk-periods)
1T
2T
(MDS_pulsewidth
1)
4T
0
1
3
MDS_PRERUN_ENA
R/W
0
1
2 to 0
MDS_PULSEWIDTH[2:0]
R/W
000
001
010 to
111
Table 52.
Default settings are shown highlighted.
Bit
Symbol
7
MDS_MAN
MDS_MAN_ADJUSTDLY register (address 04h) bit description
Access
R/W
Value
Description
adjustment delay mode
auto-control adjustment delays
manual control adjustment delays
adjustment delay value
if MDS_MAN = 0 then initial value adjustment
delay
if MDS_MAN = 1 then controls adjustment delay
0
1
6 to 0
MDS_MAN_ADJUSTDLY[6:0]
R/W
40h
-
Table 53.
Default settings are shown highlighted.
Bit
Symbol
7 to 0
MDS_AUTO_CYCLES[7:0]
MDS_AUTO_CYCLES register (address 05h) bit description
Access
R/W
Value
80h
Description
number of evaluation cycles applied for MDS
Table 54.
Default settings are shown highlighted.
Bit
Symbol
7
MDS_SR_CKEN
MDS_MISCCNTRL1 register (address 06h) bit description
Access
R/W
Value
Description
lock mode
free-running mds_cken
MDS_cken forced LOW
lockout detector soft reset
mds_lockout in use
MDS_lockout forced LOW
lock detector soft reset
MDS_lock in use
MDS_lock forced LOW
0
1
6
MDS_SR_LOCKOUT
R/W
0
1
5
MDS_SR_LOCK
R/W
0
1
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