參數(shù)資料
型號(hào)： DAC1408D650HN
廠商： NXP Semiconductors N.V.
元件分類： 外設(shè)及接口
英文描述： Dual 14-bit DAC; up to 650 Msps; 2×, 4× or 8× interpolating
封裝： DAC1408D650HN/C1<SOT804-3|<<<1<Always Pb-free,;DAC1408D650HN/C1<SOT804-3|<<<1<Always Pb-free,;
文件頁數(shù)： 14/98頁
文件大?。?/td> 2600K
代理商： DAC1408D650HN
DAC1408D650
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 4 — 26 November 2010
14 of 98
NXP Semiconductors
DAC1408D650
2
, 4
or 8
interpolating DAC with JESD204A
The lane processing makes use of the sync patterns to synchronize the data stream,
determine the initial running disparity and extract the 10-bit word from the incoming data
stream (word-alignment).
The SYNC_OUT signal is also used during normal operation by the DAC1408D650 to
request a link reinitialization. This occurs when the 10b/8b module loses synchronization.
The SYNC_OUT signal conforms to LVDS signaling. Its common-mode voltage and its
differential peak-to-peak amplitude can be programmed using SET_SYNC_LEVEL bits in
the SET_SYNC registers (see
Table 77 on page 55
).
SYNC_OUT is asynchronous with the frame clock. There is no timing specification with
respect to the CLKINP and CLKINN inputs.
10.2.3
Comma detection and word align
This stage monitors the data stream for code characters (comma detection), decodes the
words to bytes (octets) and performs optional character replacement as part of frame/lane
alignment monitoring and correction. This module provides the required control signals to
the RX controller and ILA.
This module decodes the 10-bit words into 8-bit words (octets). The decoding table is
specified in the IEEE 802.3-2005 specification. During decoding, the disparity is
calculated according to the disparity rules mentioned in the same specification
IEEE 802.3-2005. When the disparity counter is more than +2 or less than
2, an error is
generated.
The following comma symbols are detected during data transmission irrespective of the
running disparity:
/K/ = K28.5
/F/ = K28.7
/A/ = K28.3
/R/ = K28.0
/Q/ = K28.4
A flag is sent to the control interface to reflect detected commas in registers.
The following flags are also triggered according to the following definitions:
VALID: a code group that is found in the column of the 10b/8b decoding tables
according to the current running disparity.
DISPARITY ERROR: The received code group exists in the 10b/8b decoding table,
but is not found in the proper column according to the current running disparity.
NOT-IN-TABLE (NIT) ERROR: The received code group is not found in the 10b/8b
decoding table for either disparity.
INVALID: a code group that either shows a disparity error or that does not exist in the
10b/8b decoding table.
DAC1408D650 supports character replacement whatever the state of the descrambler.
When scrambling is not active, the received K28.3 /A/ or K28.7 /F/ is replaced by the
previous sample. When scrambling is active, the corresponding data octet D28.3 (0xC) or
D28.7 (0xFC) is used.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DAC1408D650HN/C1,5 功能描述:數(shù)模轉(zhuǎn)換器- DAC DL 14BIT DAC 650MSPS 2X 4X OR 8X INT RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1408D650HN-C1 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1408D650HN-C18 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
DAC1408D650HW/C1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 14-bit DAC, up to 650 Msps, 2′ and 4′ interpolating with JESD204A interface
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