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參數(shù)資料
| 型號： | CY24233 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 150K |
| 代理商： | CY24233 |
CY24239
Document #: 38-07038 Rev. **
Page 10 of 15
AC Electrical Characteristics
T
A
= 0
°
C to +70
°
C, V
DDQ3
= 3.3V±5%, f
XTL
= 14.31818 MHz
AC clock parameters are tested and guaranteed over stated operating conditions using the stated lump capacitive load at the
clock output; Spread Spectrum is disabled.
Notes:
5.
6.
X1 input threshold voltage (typical) is V
/2.
The CY24239 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is
20 pF; this includes typical stray capacitance of short PCB traces to crystal.
X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
7.
Crystal Oscillator
V
TH
C
LOAD
X1 Input Threshold Voltage
[5]
Load Capacitance, Imposed on
External Crystal
[6]
X1 Input Capacitance
[7]
Pin Capacitance/Inductance
C
IN
Input Pin Capacitance
C
OUT
Output Pin Capacitance
L
IN
Input Pin Inductance
V
DDQ3
= 3.3V
1.65
14
V
pF
C
IN,X1
Pin X2 unconnected
28
pF
Except X1 and X2
5
6
7
pF
pF
nH
CPU Clock Outputs, CPU_F, 1:2 (Lump Capacitance Test Load = 20 pF)
Parameter
t
P
t
H
t
L
t
R
Description
Period
High Time
Low Time
Output Rise
Edge Rate
Output Fall Edge
Rate
Duty Cycle
Test Condition/
Comments
CPU = 100 MHz
Typ.
Unit
ns
ns
ns
V/ns
Min.
10
3.0
2.8
1
Max.
10.5
Measured on rising edge at 1.25
Duration of clock cycle above 2.0V
Duration of clock cycle below 0.4V
Measured from 0.4V to 2.0V
4
t
F
Measured from 2.0V to 0.4V
1
4
V/ns
t
D
Measured on rising and falling edge at
1.25V
Measured on rising edge at 1.25V. Maxi-
mum difference of cycle time between two
adjacent cycles.
Measured on rising edge at 1.25V
Assumes full supply voltage reached with-
in 1 ms from power-up. Short cycles exist
prior to frequency stabilization.
45
55
%
t
JC
Jitter,
Cycle-to-Cycle
250
ps
t
SK
f
ST
Output Skew
Frequency
Stabilization
from Power-up
(cold start)
AC Output
Impedance
350
3
ps
ms
Z
o
Average value during switching transition.
Used for determining series termination
value.
20
DC Electrical Characteristics:
T
A
= 0
°
C to +70
°
C, V
DDQ3
= 3.3V±5% (continued)
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY24239 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Spread Spectrum Frequency Timing Generator |
| CY24239PVC | 功能描述:鎖相環(huán) - PLL MediaClock Clock RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY24239PVCT | 制造商:Cypress Semiconductor 功能描述: |
| CY24240ASC | 功能描述:時鐘緩沖器 MediaClock Clock COM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY24240SC | 制造商:Cypress Semiconductor 功能描述: |
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