參數資料
型號: CS5534-ASZR
廠商: Cirrus Logic Inc
文件頁數: 33/43頁
文件大?。?/td> 0K
描述: IC ADC 24BIT 4CH W/LNA 24-SSOP
標準包裝: 1,000
位數: 24
采樣率(每秒): 3.84k
數據接口: 串行
轉換器數目: 1
功率耗散(最大): 45mW
電壓電源: 模擬和數字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-SSOP(0.209",5.30mm 寬)
供應商設備封裝: 24-SSOP
包裝: 帶卷 (TR)
輸入數目和類型: 4 個差分,單極;4 個差分,雙極
配用: 598-1016-ND - EVAL BOARD FOR CS5534
CS5531/32/33/34-AS
DS289F5
39
2.10. Clock Generator
The CS5531/32/33/34 include an on-chip inverting
amplifier which can be connected with an external
crystal to provide the master clock for the chip. Fig-
ure 20 illustrates the on-chip oscillator. It includes
loading capacitors and a feedback resistor to form
a Pierce oscillator configuration. The chips are de-
signed to operate using a 4.9152 MHz crystal;
however, other crystals with frequencies between
1 MHz to 5 MHz can be used. One lead of the crys-
tal should be connected to OSC1 and the other to
OSC2. Lead lengths should be minimized to reduce
stray capacitance. Note that while using the on-chip
oscillator, neither OSC1 or OSC2 is capable of di-
rectly driving any off-chip logic. When the on-chip
oscillator is used, the voltage on OSC2 is typically
0.5 V peak-to-peak. This signal is not compatible
with external logic unless additional external cir-
cuitry is added. The OSC2 output should be used if
the on-chip oscillator output is used to drive other
circuitry.
The designer can use an external CMOS-compati-
ble oscillator to drive OSC2 with a 1 MHz to
5 MHz clock for the ADC. The external clock into
OSC2 must overdrive the 60
A output of the on-
chip amplifier. This will not harm the on-chip cir-
cuitry. In this scheme, OSC1 should be left uncon-
nected.
2.11. Power Supply Arrangements
The CS5531/32/33/34 are designed to operate from
single or dual analog supplies and a single digital
supply. The following power supply connections
are possible:
VA+ = +5V; VA- = 0V; VD+ = +3V to +5V
VA+ = +2.5V; VA- = -2.5V; VD+ = +3V to +5V
VA+ = +3V; VA- = -3V; VD+ = +3V
A VA+ supply of +2.5 V, +3.0 V, or +5.0 V should
be maintained at ±5% tolerance. A VA- supply of
-2.5 V or -3.0 V should be maintained at ±5% tol-
erance. VD+ can extend from +2.7 V to +5.5 V
with the additional restriction that:
[(VD+) - (VA-)] < 7.5 V.
Figure 21 illustrates the CS5532 connected with a
single +5.0 V supply to measure differential inputs
relative to a common mode of 2.5 V. Figure 22 il-
lustrates the CS5532 connected with ±2.5 V bipo-
lar analog supplies and a +3 V to +5 V digital
supply to measure ground referenced bipolar sig-
nals. Figures 23 and 24 illustrate the CS5532 con-
nected with ±3 V analog supplies and a +3 V
digital supply to measure ground-referenced bipo-
lar signals.
Figure 25 illustrates alternate bridge configurations
which can be measured with the converter. Voltage
V1 can be measured with the PGIA gain set to 1x
as the input amplifier on this gain setting can go
rail-to-rail. Voltage V2 should be measured with
the PGIA gain set at 2x or higher as the instrumen-
1 M
OSC1
OSC2
20 pF
+
-
V
TH
MCLK
~
~ 60 A
NOTE: 20 pF capacitors are on
chip and should not be added
externally.
Figure 20. On-chip Oscillator Model
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CS5534-BSZ/H 制造商:Cirrus Logic 功能描述:
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