6.2.2 DIGITAL INTERFACE FORMAT (DIF) BIT 4-6 Default = 000 - Format " />
參數(shù)資料
型號: CS4341-CZZ
廠商: Cirrus Logic Inc
文件頁數(shù): 19/34頁
文件大小: 0K
描述: IC DAC STER 24BIT 96KHZ 16TSSOP
標(biāo)準(zhǔn)包裝: 96
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 單電源
功率耗散(最大): 90mW
工作溫度: -10°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 96k
產(chǎn)品目錄頁面: 756 (CN2011-ZH PDF)
其它名稱: 598-1050-5
CS4341
26
DS298F5
6.2.2 DIGITAL INTERFACE FORMAT (DIF) BIT 4-6
Default = 000 - Format 0 (IS, up to 24-bit data, 64 x Fs Internal SCLK)
Function:
The required relationship between the Left/Right clock, serial clock and serial data is defined by the
Digital Interface Format and the options are detailed in Figures 17 through 19.
6.2.3 DE-EMPHASIS CONTROL (DEM) BIT 2-3
Default = 00
00 - Disabled
01 - 44.1 kHz
10 - 48 kHz
11 - 32 kHz
Function:
Implementation of the standard 15
s/50s digital de-emphasis filter response, Figure 20, requires re-
configuration of the digital filter to maintain the proper filter response for 32, 44.1 or 48 kHz sample
rates.
NOTE: De-emphasis is only available in Single-Speed Mode.
6.2.4 POPGUARD TRANSIENT CONTROL (POR) BIT 1
Default = 1
0 - Disabled
1 - Enabled
Function:
The Popguard Transient Control allows the quiescent voltage to slowly ramp to and from 0 volts to
the quiescent voltage during power-on or power-down. Please refer to section 4.6 for implementation
details.
6.2.5 POWER DOWN (PDN) BIT 0
Default = 1
0 - Disabled
1 - Enabled
Function:
The device will enter a low-power state when this function is enabled. The power-down bit defaults to
‘enabled’ on power-up and must be disabled before normal operation can occur. The contents of the
control registers are retained in this mode.
DIF2
DIF1
DIF0
DESCRIPTION
Format
FIGURE
0
IS, up to 24-bit data, 64Fs Internal SCLK
0
0
1
IS, up to 16-bit data, 32Fs Internal SCLK
1
0
1
0
Left Justified, up to 24-bit data,
2
0
1
Right Justified, 24-bit data
3
1
0
Right Justified, 20-bit data
4
1
0
1
Right Justified, 16-bit data
5
1
0
Right Justified, 18-bit data
6
1
Identical to Format 1
1
Table 5. Digital Interface Format
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