參數(shù)資料
型號(hào)： CS4341-CZZ
廠商： Cirrus Logic Inc
文件頁數(shù)： 14/34頁
文件大小： 0K
描述： IC DAC STER 24BIT 96KHZ 16TSSOP
標(biāo)準(zhǔn)包裝： 96
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
功率耗散（最大）： 90mW
工作溫度： -10°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
輸出數(shù)目和類型： 2 電壓，單極
采樣率（每秒）： 96k
產(chǎn)品目錄頁面： 756 (CN2011-ZH PDF)
其它名稱： 598-1050-5
CS4341
DS298F5
21
4.9.1
Rise Time for Control Port Clock
When excess capacitive loading is present on the IC clock line, pin 6 (SCL/CCLK) may not have
sufficient hysteresis to meet the standard IC rise time specification. This prevents the use of com-
mon IC configurations with a resistor pull-up. A workaround is achieved by placing a Schmitt Trig-
ger buffer, a 74HC14 for example, on the SCL line just prior to the CS4341. This will not affect the
operation of the IC bus as pin 6 is an input only.
4.9.2
Memory Address Pointer (MAP)
The MAP byte precedes the control port register byte during a write operation and is not available
again until after a start condition is initiated. During a read operation the byte transmitted after the
ACK will contain the data of the register pointed to by the MAP (see section 4.9.3 for write/read
details).
4.9.2a
INCR (Auto Map Increment)
The device has a MAP auto increment capability enabled by the INCR bit (the MSB) of the MAP.
If INCR is set to 0, MAP will stay constant for successive IC writes or reads and SPI writes. If INCR
is set to 1, MAP will auto increment after each byte is written, allowing block reads or writes of suc-
cessive registers.
Default = ‘0’
0 - Disabled
1 - Enabled
4.9.2b
MAP0-3 (Memory Address Pointer)
Default = ‘0000’
4.9.3
IC Mode
In the IC Mode, data is clocked into and out of the bi-directional serial control data line, SDA, by
the serial control port clock, SCL. There is no CS pin. Pin AD0 enables the user to alter the chip
address (001000[AD0][R/W]) and should be tied to VA or AGND as required, before powering up
the device. If the device ever detects a high to low transition on the AD0/CS pin after power-up,
SPI mode will be selected.
7
654
32
10
INCR
Reserved
MAP3
MAP2
MAP1
MAP0
0
000
00
Pin 6
VA
SC L
Figure 21. IC Buffer Example
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CS4341-KS 功能描述:數(shù)模轉(zhuǎn)換器- DAC 24-bit 96kHz 101dB Stereo DAC w/VC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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CS4341-KSZR 制造商:Cirrus Logic 功能描述:DAC DUAL DELTA-SIGMA 24BIT 16SOIC - Tape and Reel
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