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參數(shù)資料
| 型號： | CS2100P-DZZR |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | PLL合成/DDS/VCOs |
| 中文描述： | PHASE LOCKED LOOP, 30 MHz, PDSO10 |
| 封裝： | 3 MM, LEAD FREE, MO-187, MSOP-10 |
| 文件頁數(shù)： | 13/25頁 |
| 文件大?。?/td> | 223K |
| 代理商： | CS2100P-DZZR |
CS2100-OTP
20
DS841F2
6. PARAMETER DESCRIPTIONS
As mentioned in Section 5.1 on page 11, there are two different kinds of parameter configuration sets, Modal and
Global. These configuration sets, shown in Figure 16, can be programmed in the field using the CDK2000 or pre-
programmed at the factory. Please see “Programming Information” on page 24 for more details.
Figure 16. Parameter Configuration Sets
6.1
Modal Configuration Sets
There are four instances of each of these configuration parameters. Selection between the four stored sets
is made using the M[1:0] pins.
6.1.1
R-Mod Selection (RModSel[1:0])
Selects the R-Mod value, which is used as a factor in determining the PLL’s Fractional N.
Note:
This parameter does not take affect unless M2 pin is high and the M2Config[2:0] global param-
eter is set to ‘011’.
RModSel[1:0]
R-Mod Selection
00
Right-shift R-value by 1 (÷ 2).
01
Right-shift R-value by 2 (÷ 4).
10
Right-shift R-value by 3 (÷ 8).
11
Right-shift R-value by 4 (÷ 16).
Application:
M[1:0] pins
Modal Configuration Set #0
RModSel[1:0]
AuxOutSrc[1:0]
Modal Configuration Set #1
Ratio 1
RModSel[1:0]
AuxOutSrc[1:0]
Modal Configuration Set #2
Ratio 2
RModSel[1:0]
AuxOutSrc[1:0]
Modal Configuration Set #3
Ratio 3
RModSel[1:0]
AuxOutSrc[1:0]
00
01
10
11
Global Configuration Set
RefClkDiv[1:0]
ClkOutUnl
AuxLockCfg
LFRatioCfg
M2Config[2:0]
Ratio 0
Digital/PL
L
Core
ClkIn_BW[2:0]
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