參數(shù)資料
型號: CR16HCT5
文件頁數(shù): 146/157頁
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代理商: CR16HCT5
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146
Figure 88.
ACB signals (SDA and SCL) Rise Time and Fall Timing
Figure 89.
ACB Start and Stop Condition Timing
Figure 90.
ACB Start Conditioning Timing
SDA
t
SDAr
0.7V
CC
0.3V
CC
t
SDAf
0.7V
CC
0.3V
CC
SCL
t
SCLr
0.7V
CC
0.3V
CC
t
SCLf
0.7V
CC
0.3V
CC
Note: In the timing tables the parameter name is added with an “o” for
output signal timing and “i” for input signal timing.
SDA
SCL
t
CSTOs
t
BUF
t
DLCs
t
CSTRh
Start Condition
Stop Condition
Note: In the timing tables the parameter name is added with an “o” for
output signal timing and “i” for input signal timing.
SDA
SCL
t
CSTRs
t
DHCs
Start Condition
t
CSTRh
Note: In the timing tables the parameter name is added with an “o” for
output signal timing and “i” for input signal timing.
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