參數(shù)資料
型號(hào): CPS1027-J
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁(yè)數(shù): 27/64頁(yè)
文件大小: 870K
代理商: CPS1027-J
Agere Systems Inc.
27
Data Sheet
January 2002
CSP1027 Voice Band Codec for
Cellular Handset and Modem Applications
5 Register Information
(continued)
5.2 Codec I/O Control 1 (cioc1) Register
Table 8. Codec I/O Control 1 (cioc1) Register
Bit
15—14
Field
13
12—6
ADJ[6:0]
5
4—0
CDIV1
Reg
ADJMOD
CDIV0
Field
Reg
ADJMOD
Value
01
0*
1
000 0000*
000 0001
000 0010
.
.
.
111 1110
111 1111
0
1*
0 0000
0 0001
0 0010
.
.
.
1 0000*
.
.
.
1 1110
1 1111
Description
Indicates control register 0.
Select retard mode for internal clock, ICLK0, adjustment.
Select advance mode for internal clock, ICLK0, adjustment.
Internal clock, ICLK0, not adjusted.
Internal clock, ICLK0, adjusted by one ICLK cycle for one ICLK0 cycle.
Internal clock, ICLK0, adjusted by one ICLK cycle for two ICLK0 cycles.
* Value upon reset.
ADJ
.
.
.
Internal clock, ICLK0, adjusted by one ICLK cycle for 126 ICLK0 cycles.
Internal clock, ICLK0, adjusted by one ICLK cycle for 127 ICLK0 cycles.
Internal clock, ICLK0 = ICLK ÷ 1.
Internal clock, ICLK0 = ICLK ÷ 2.
Output clock 1, CKO1, disabled.
Output clock 1, CKO1 = ICLK0 ÷ 1.
Output clock 1, CKO1 = ICLK0 ÷ 2.
CDIV0
CDIV1
.
.
.
Output clock 1, CKO1 = ICLK0 ÷ 16.
.
.
.
Output clock 1, CKO1 = ICLK0 ÷ 30.
Output clock 1, CKO1 = ICLK0 ÷ 31.
相關(guān)PDF資料
PDF描述
CPS1027-S Telecommunication IC
CPS1087 Analog IC
CPU16RM M68HC16 Family CPU16 Reference Manual
CQ202-4M 4.0 AMP TRIAC 600 THRU 800 VOLTS
CQ202-4B TRIAC|200V V(DRM)|4A I(T)RMS|TO-202
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CPS1027-S 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC
CPS1033A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
CPS1036A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
CPS1037A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC
CPS1038A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC