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參數(shù)資料
| 型號： | CPM100 |
| 英文描述： | CPM100 - DISCONTINUED PRODUCT. No longer recommended for new design. |
| 中文描述： | CPM100 -已停產(chǎn)產(chǎn)品。不再推薦用于新設計。 |
| 文件頁數(shù)： | 6/11頁 |
| 文件大?。?/td> | 152K |
| 代理商： | CPM100 |
6
CMP100
DISCUSSION OF
SPECIFICATIONS
ANALOG INPUT
Offset Voltage, V
The value of the the comparison threshold for V
or V
REF 2
= 0V. V
and maximum drift vs temperature of V
OS
guaranteed.
Common Mode Error
As V
varies over its range, there is a small gain error
which manifests itself as a change in the comparison level.
Common mode error drifts typically –15
μ
V/
o
C.
DYNAMIC PERFORMANCE
Figure 1 illustrates the following analog and logic perform-
ance definitions.
Input to Output High Propagation Delay, t
t
is the propagation delay measured from the time the
input signal crosses the input offset voltage to the 50% point
of an output (Q output) Low-to-High transition. Output logic
is not latched for this definition.
Input to Output Low Propagation Delay, t
t
is the propagation delay measured from the time the
input signal crosses the input offset voltage to the 50% point
of an output (Q output) High-to-Low transition. Output logic
is not latched for this definition.
The propagation delay of the CMP100 is virtually identical
for negative going and positive going analog input edges.
Differential Propagation Delay (Skew), t
t
is the difference in propagation delay from one com-
parator to another. The skew between each half of one
CMP100 is no greater than 200ps.
Propagation Delay Dispersion
Propagation Delay Dispersion is the variation in propagation
delay versus input overdrive. Note that propagation delay
may also be a function of input slew rate and of the previous
level.
The input waveform for the propagation delay specification
is illustrated in the first typical performance curve, Propa-
gation Delay vs Overdrive. The Propagation Delay listed
in the Electrical Specifications table is specified using an
input waveform with 100mV overdrive, a previous level of
–200mV and a slew rate of 200V/
μ
s. A typical propagation
delay curve is also shown for a previous level of –1V. The
outputs are not latched for this specification.
Overdrive
Overdrive is the voltage by which the input exceeds V
REF
±
V
OS
.
Minimum Set-Up Time, t
t
is the minimum time before the positive transition of the
Latch Enable (LE) that an analog input signal change must
be present in order to be acquired and held at the outputs.
t
PDL
V
REF 2
Q
2
Q
2
Analog In
0V
LE
2
LE
2
t
LDOH
t
H
t
S
V
REF 1
Q
1
LE
1
t
PW
t
LDOL
t
PDH
LE
1
Q
1
FIGURE 1. Analog and Logic Timing Definitions.
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