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參數(shù)資料
| 型號： | CPM100 |
| 英文描述： | CPM100 - DISCONTINUED PRODUCT. No longer recommended for new design. |
| 中文描述： | CPM100 -已停產(chǎn)產(chǎn)品。不再推薦用于新設(shè)計(jì)。 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大?。?/td> | 152K |
| 代理商： | CPM100 |
2
CMP100
ABSOLUTE MAXIMUM RATINGS
V+ to Digital Common and Power Common .......................................+6V
V– to Digital Common and Power Common ....................................... –6V
(V+) – (V–) ........................................................................................... 12V
Digital Inputs to Digital Common
Differential.........................................................................................
±
4V
Common Mode ......................................................................... V– to V+
Differential Analog Input Voltage .......................................................
±
25V
Package Power Dissipation ........................................................... 750mW
Storage Temperature......................................................–60
°
C to +150
°
C
Lead Temperature (soldering, 10s) ............................................... +300
°
C
Stresses exceeding those listed above may cause permanent damage to
the device. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
PIN DEFINITIONS
PIN
NAME
DESCRIPTION
1, 15
2, 3
4
5
6, 7
8, 10
9
11
12
13
14
16
LE2, LE2
Q2, Q2
DCOM
PWRCOM
Q1, Q1
LE1, LE1
V+
V
Analog In
ACOM
V
REF 2
V–
LATCH or UNLATCH comparator 1 outputs
ECL outputs of comparator 2
Return for comparator circuits
Return for ECL output transistor currents
ECL outputs of comparator 1
LATCH or UNLATCH comparator 2 outputs
Positive Supply Voltage, +5V
Reference Voltage for comparator 1
Analog Signal input
Return for Analog In, V
, V
Reference voltage for comparator 2
Negative Supply Voltage: (ECL Supply, –5.2V)
SPECIFICATIONS
ELECTRICAL
T
A
= 25
°
C and at rated supplies: V+ = +5V, V– = –5.2V unless otherwise noted.
CMP100AP, AU
PARAMETER
MIN
TYP
MAX
UNITS
ANALOG INPUTS
Differential Input Voltage Range
Common Mode Voltage Range
Resistance
Reference Inputs: V
REF 1
, V
REF 2
Analog Input
Capacitance, All Inputs
24
±
12
V
V
45
90
60
120
2
75
150
k
k
pF
TRANSFER CHARACTERISTICS
ACCURACY
Input Offset Voltage, V
OS
Common Mode Error
Voltage Offset Drift
Power Supply Sensitivity of Offset:
V
OS
/
V+
(1)
10
20
10
250
±
10
±
10
mV
mV/V
μ
V/
°
C
μ
V/V
μ
V/V
100
V
OS
/
V–
RESPONSE TIME
Propagation Delay, t
100mV Overdrive, Latch Disabled
(2, 3)
3.6
5
ns
DIGITAL SIGNALS
(4)
(Over Specification Temperature Range)
Inputs (Latch Controls)
Logic Levels: V
IH
–1.1
V
V
μ
A
μ
A
V
IL
I
IH
(V
I
= –1.1V)
I
(V
I
= –1.5V)
–1.5
50
5
Outputs (Balanced)
Logic Levels: V
OL
(50
Load to –2V)
V
OH
(50
Load to –2V)
–1.5
V
V
–1.1
POWER SUPPLY REQUIREMENTS
Supply Voltage
V+
V–
Supply Current
(5)
V+
V–
Power Dissipation
(6)
+4.75
–5.45
+5
–5.2
+5.25
–4.95
VDC
VDC
+30
–40
360
+40
–50
460
mA
mA
mW
TEMPERATURE RANGE
Specification
Storage
–25
–65
+85
+150
°
C
°
C
NOTES: (1) Defined as half the magnitude between low-to-high and high-to-low transition input voltages. (2) See section on “Measuring CMP100 Performance.”
(3) See “Discussion of Specifications” for exact conditions. (4) 10k ECL compatible. (5) Maximum supply current is specified at typical supply voltages. (6) Maximum
Power Dissipation is calculated with typical supply voltages and maximum currents. Note that dissipation in the output transistors from driving 50
ECL loads will
increase the total power dissipation by about 50mW.
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