參數(shù)資料
型號: COP8SDR9IMT7
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
中文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO48
封裝: TSSOP-48
文件頁數(shù): 25/80頁
文件大小: 972K
代理商: COP8SDR9IMT7
10.0 Functional Description
(Continued)
10.9 CONTROL REGISTERS
10.9.1 CNTRL Register (Address X'00EE)
T1C3
T1C2
T1C1
T1C0
MSEL
IEDG
SL1
SL0
Bit 7
Bit 0
The Timer1 (T1) and MICROWIRE/PLUS control register
contains the following bits:
T1C3
Timer T1 mode control bit
T1C2
Timer T1 mode control bit
T1C1
Timer T1 mode control bit
T1C0
Timer
T1
Start/Stop
modes 1 and
Pending Flag in timer mode 3
MSEL
Selects G5 and G4 as MICROWIRE/PLUS
signals SK and SO respectively
IEDG
External
interrupt
(0 = Rising edge, 1 = Falling edge)
SL1 & SL0 Select the MICROWIRE/PLUS clock divide
by (00 = 2, 01 = 4, 1x = 8)
control
Underflow
in
timer
2.
T1
Interrupt
edge
polarity
select
10.9.2 PSW Register (Address X'00EF)
HC
C
T1PNDA
T1ENA
EXPND
BUSY
EXEN
GIE
Bit 7
Bit 0
The PSW register contains the following select bits:
HC
Half Carry Flag
C
Carry Flag
T1PNDA Timer T1 Interrupt Pending Flag (Autoreload RA
in mode 1, T1 Underflow in Mode 2, T1Acapture
edge in mode 3)
T1ENA
Timer T1 Interrupt Enable for Timer Underflow
or T1A Input capture edge
EXPND
External interrupt pending
BUSY
MICROWIRE/PLUS busy shifting flag
EXEN
Enable external interrupt
GIE
Global interrupt enable (enables interrupts)
The Half-Carry flag is also affected by all the instructions that
affect the Carry flag. The SC (Set Carry) and R/C (Reset
Carry) instructions will respectively set or clear both the carry
flags. In addition to the SC and R/C instructions, ADC,
SUBC, RRC and RLC instructions affect the Carry and Half
Carry flags.
10.9.3 ICNTRL Register (Address X'00E8)
Unused
LPEN
T0PND
T0EN
μWPND
μWEN
T1PNDB
T1ENB
Bit 7
Bit 0
The ICNTRL register contains the following bits:
LPEN
L
Port
Wake-up/Interrupt)
T0PND
Timer T0 Interrupt pending
T0EN
Timer T0 Interrupt Enable (Bit 12 toggle)
μWPND MICROWIRE/PLUS interrupt pending
μWEN
Enable MICROWIRE/PLUS interrupt
T1PNDB Timer T1 Interrupt Pending Flag for T1B capture
edge
T1ENB
Timer T1 Interrupt Enable for T1B Input capture
edge
Interrupt
Enable
(Multi-Input
10.9.4 T2CNTRL Register (Address X'00C6)
T2C3
T2C2
T2C1
T2C0
T2PNDA
T2ENA
T2PNDB
T2ENB
Bit 7
Bit 0
The T2CNTRL register contains the following bits:
T2C3
Timer T2 mode control bit
T2C2
Timer T2 mode control bit
T2C1
Timer T2 mode control bit
T2C0
Timer
T2
modes 1 and 2, Timer T2 Underflow Interrupt
Pending Flag in timer mode 3
T2PNDA Timer T2 Interrupt Pending Flag (Autoreload
RA in mode 1, T2 Underflow in mode 2, T2A
capture edge in mode 3)
T2ENA
Timer T2 Interrupt Enable for Timer Underflow
or T2A Input capture edge
T2PNDB Timer T2 Interrupt Pending Flag for T2B cap-
ture edge
T2ENB
Timer T2 Interrupt Enable for T2B Input capture
edge
Start/Stop
control
in
timer
High Speed Oscillator
Low Speed Oscillator
10138915
10138916
FIGURE 12. Crystal Oscillator
C
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