
part. Some design considerations are outlined below.
100604B
Conexant
3-1
3
3.0  Applications
The CN8331/CN8332/CN8333 can be used in a variety of applications.
Figure 3-1
 illustrates an example of three DS3 lines being terminated by the 
CN8333. The data and clock are extracted and passed on to the framer chip for 
further data manipulation and user interface.
It is important to employ high-frequency design techniques for the printed 
board layout.
3.1  PCB Design Considerations for 
CN8331/CN8332/CN8333
The CN8333 device is a triple LIU operating at frequencies up to 52 MHz. The 
high-speed nature of the device calls for a careful design of the PCB using this 
3.1.1  Power Supply and Ground Plane 
A unified power plane with properly placed capacitors of the correct size will 
mitigate most power rail-related voltage transients. A properly placed bulk 
capacitor, where the power enters the board, with noise-bypassing capacitors at 
the power pins on the integrated circuits should be adequate. The noise-bypassing 
capacitors must be able to supply all the switching current.
Ferrite beads are used with power rails to filter the high-frequency noise. For 
every design, noise frequencies and levels are different. Therefore, whether beads 
are necessary, and the effective frequency where they should operate, is difficult 
to determine. It is a good idea to provision for ferrite beads on the boards.
The board trace from the CN8333 power supply pin to the noise-bypassing 
capacitor should be minimized. Additionally, ground connections from the 
ground plane to the CN8333 ground pins and the noise-bypassing capacitor 
ground pins should be minimized.
A unified ground plane is the best way to minimize ground impedance. Most 
of the ground noise is produced by the return currents and power supply transients 
during switching. This effect is minimized by reducing the ground plane 
impedance.
Powered by ICminer.com Electronic-Library Service CopyRight 2003