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參數(shù)資料
| 型號： | CN8332EXF |
| 英文描述： | PCM Transceiver |
| 中文描述： | 收發(fā)器的PCM |
| 文件頁數(shù)： | 14/48頁 |
| 文件大?。?/td> | 434K |
| 代理商： | CN8332EXF |
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Transmit clock Ch3
1.0 Pin Description
CN8331/CN8332/CN8333
1.1 Pin Assignments
Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit
1-6
Conexant
100604B
53
67
67
RCLK/ RCLK1
Receive clock Ch1
O
Recovered clock for each channel receiver,
intended for strobing the corresponding
RDAT into the following framer or logic.
—
34
53
RCLK2
Receive clock Ch2
O
—
—
34
RCLK3
Receive clock Ch3
O
49
63
63
TPOS/
TPOS1/
TNRZ/ TNRZ1
Ch1 transmit Positive
rail or NRZ data
I
Synchronized transmit data intended to be
strobed in by the corresponding TCLK.
When ENDECDIS = 1, these inputs are
expected to be positive and negative AMI
data (TPOS and TNEG).
When ENDECDIS = 0, these inputs are
expected to be uncoded NRZ data (TNRZ)
and no connects (NC).
See notes on the ENDECDIS pin.
48
64
64
TNEG/
TNEG1/
NC/
NC1
Ch1 transmit Negative
rail or no connect data
I
—
38
49
TPOS2/
TNRZ2
Ch2 transmit
Positive/NRZ data
I
—
37
48
TNEG2/ NC2
Ch2 transmit Negative
data
I
—
—
38
TPOS3/
TNRZ3
Ch3 transmit
Positive/NRZ data
I
—
—
37
TNEG3/ NC3
Ch3 transmit Negative
data
I
50
62
62
TCLK/ TCLK1
Transmit clock Ch1
I
Transmit bit clock input for strobing with
transmit data into the CN833x.
—
39
50
TCLK2
Transmit clock Ch2
I
—
—
39
TCLK3
I
52
66
66
RLOS/ RLOS1
Loss of signal Ch1
O
Loss Of Signal (LOS) indication for each
channel, as determined by insufficient pulse
density. Signal loss detected when RLOS =
1. An LOS will be asserted when 175±75
zeros occur in a row and deasserted when
the pulse density is between 28% and 33%
(DS3/STS-1) (i.e., a 1
’
s density).
—
35
52
RLOS2
Loss of signal Ch2
O
—
—
35
RLOS3
Loss of signal Ch3
O
Table 1-1. CN8331/CN8332/CN8333 Pin Definitions
(2 of 6)
Pin #
Signal Name
Description
I/O/P
Notes
CN8331
CN8332
CN8333
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