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參數資料
| 型號： | CN8332EXF |
| 英文描述： | PCM Transceiver |
| 中文描述： | 收發(fā)器的PCM |
| 文件頁數： | 16/48頁 |
| 文件大?。?/td> | 434K |
| 代理商： | CN8332EXF |
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Gain Enable
1.0 Pin Description
CN8331/CN8332/CN8333
1.1 Pin Assignments
Single/Dual/Triple E3/DS3/STS-1 Line Interface Unit
1-8
Conexant
100604B
56
74
74
LLOOP/
LLOOP1
Local loopback enable
Ch1
I
Local loopback enable per channel. The
transmit data is looped back immediately
from the encoder to the decoder in place of
the received data.
1 = local loopback enabled
0 = local loopback disabled
—
27
56
LLOOP2
Local loopback enable
Ch2
I
—
—
27
LLOOP3
Local loopback enable
Ch3
I
57
75
75
RLOOP/
RLOOP1
Remote loopback
enable Ch1
I
Remote loopback enable per channel. The
receive data, retimed after clock recovery, is
looped back into the AMI generator in place
of the transmit data.
1 = remote loopback enabled
0 = remote loopback disabled
—
26
57
RLOOP2
Remote loopback
enable Ch2
I
—
—
26
RLOOP3
Remote loopback
enable Ch3
I
45
71
71
XOE/
XOE1
Transmit output enable
Ch1
I
Transmit output enable per channel.
1 = transmit line output driver enabled
0 = transmit output driver set to high
impedance state
—
30
45
XOE2
Transmit output enable
Ch2
I
—
—
30
XOE3
Transmit output enable
Ch3
I
—
70
70
REQH1
Ch1 Receive High EQ
Gain Enable
I
The equalizer in the CN833x has two gain
settings. The higher gain setting is designed
to optimally equalize a nominally-shaped
(meets the pulse template), pulse-driven
DS3 or STS-1 waveform that is driven
through 0
–
900feet of cable.
Square-shaped pulses such as E3 or
DS3-HIGH require less high-frequency gain
and should use the low EQ gain setting.
REQH = 1 high EQ gain (DS3/STS-1modes)
REQH = 0 low EQ gain (E3/DS3
SquareModes)
46
—
46
REQH/
REQH2
Ch2 Receive High EQ
I
—
31
31
REQH3
Ch3 Receive High EQ
Gain Enable
I
Power/Ground
12
4
4
TVDD/ TVDD1
TX power Ch1
P
Power pins for transmit circuitry per
channel (3.3 V).
—
20
12
TVDD2
TX power Ch2
P
—
—
20
TVDD3
TX power Ch3
P
9
1
1
TVSS/ TVSS1
TX ground Ch1
P
Ground pins for transmit circuitry per
channel.
—
17
9
TVSS2
TX ground Ch2
P
—
—
17
TVSS3
TX ground Ch3
P
13
5
5
RVDD/
RVDD1
RX power Ch1
P
Power pins for receive circuitry per channel
(3.3 V).
Connect to 3.3 V power.
—
13
13
RVDD2
RX power Ch2
P
—
—
21
RVDD3
RX power Ch3
P
Table 1-1. CN8331/CN8332/CN8333 Pin Definitions
(4 of 6)
Pin #
Signal Name
Description
I/O/P
Notes
CN8331
CN8332
CN8333
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